@@ -22,8 +22,15 @@
#include "qapi/error.h"
#include "qapi/qmp/qerror.h"
#include "hw/acpi/acpi.h"
+#include "sysemu/numa.h"
+#include "hw/acpi/hmat.h"
void acpi_table_add(const QemuOpts *opts, Error **errp)
{
error_setg(errp, QERR_UNSUPPORTED);
}
+
+void hmat_update(NumaState *nstat)
+{
+ /* For qmp_set_hmat_lb and qmp_set_hmat_cache in numa.c can compile */
+}
@@ -188,7 +188,7 @@ void parse_numa_distance(MachineState *ms, NumaDistOptions *dist, Error **errp)
}
static void parse_numa_hmat_lb(MachineState *ms, NumaHmatLBOptions *node,
- Error **errp)
+ bool runtime_flag, Error **errp)
{
int nb_numa_nodes = ms->numa_state->num_nodes;
NodeInfo *numa_info = ms->numa_state->nodes;
@@ -265,7 +265,8 @@ static void parse_numa_hmat_lb(MachineState *ms, NumaHmatLBOptions *node,
if (!hmat_lb) {
hmat_lb = g_malloc0(sizeof(*hmat_lb));
ms->numa_state->hmat_lb[node->hierarchy][node->data_type] = hmat_lb;
- } else if (hmat_lb->latency[node->initiator][node->target]) {
+ } else if (!runtime_flag &&
+ hmat_lb->latency[node->initiator][node->target]) {
error_setg(errp, "Duplicate configuration of the latency for "
"initiator=%" PRIu16 " and target=%" PRIu16 ".",
node->initiator, node->target);
@@ -286,7 +287,8 @@ static void parse_numa_hmat_lb(MachineState *ms, NumaHmatLBOptions *node,
if (!hmat_lb) {
hmat_lb = g_malloc0(sizeof(*hmat_lb));
ms->numa_state->hmat_lb[node->hierarchy][node->data_type] = hmat_lb;
- } else if (hmat_lb->bandwidth[node->initiator][node->target]) {
+ } else if (!runtime_flag &&
+ hmat_lb->bandwidth[node->initiator][node->target]) {
error_setg(errp, "Duplicate configuration of the bandwidth for "
"initiator=%" PRIu16 " and target=%" PRIu16 ".",
node->initiator, node->target);
@@ -314,7 +316,7 @@ static void parse_numa_hmat_lb(MachineState *ms, NumaHmatLBOptions *node,
static
void parse_numa_hmat_cache(MachineState *ms, NumaHmatCacheOptions *node,
- Error **errp)
+ bool runtime_flag, Error **errp)
{
int nb_numa_nodes = ms->numa_state->num_nodes;
HMAT_Cache_Info *hmat_cache = NULL;
@@ -339,7 +341,8 @@ void parse_numa_hmat_cache(MachineState *ms, NumaHmatCacheOptions *node,
node->level, node->total);
return;
}
- if (ms->numa_state->hmat_cache[node->node_id][node->level]) {
+ if (!runtime_flag &&
+ ms->numa_state->hmat_cache[node->node_id][node->level]) {
error_setg(errp, "Duplicate configuration of the side cache for "
"node-id=%" PRIu32 " and level=%" PRIu8 ".",
node->node_id, node->level);
@@ -419,13 +422,13 @@ void set_numa_options(MachineState *ms, NumaOptions *object, Error **errp)
&err);
break;
case NUMA_OPTIONS_TYPE_HMAT_LB:
- parse_numa_hmat_lb(ms, &object->u.hmat_lb, &err);
+ parse_numa_hmat_lb(ms, &object->u.hmat_lb, 0, &err);
if (err) {
goto end;
}
break;
case NUMA_OPTIONS_TYPE_HMAT_CACHE:
- parse_numa_hmat_cache(ms, &object->u.hmat_cache, &err);
+ parse_numa_hmat_cache(ms, &object->u.hmat_cache, 0, &err);
if (err) {
goto end;
}
@@ -688,6 +691,44 @@ void qmp_set_numa_node(NumaOptions *cmd, Error **errp)
set_numa_options(MACHINE(qdev_get_machine()), cmd, errp);
}
+void qmp_set_hmat_lb(NumaHmatLBOptions *node, Error **errp)
+{
+ MachineState *ms = MACHINE(qdev_get_machine());
+
+ if (ms->numa_state == NULL || ms->numa_state->num_nodes <= 0) {
+ error_setg(errp, "NUMA is not supported");
+ return;
+ }
+
+ if (ms->numa_state->hma_enabled) {
+ parse_numa_hmat_lb(ms, node, 1, errp);
+ hmat_update(ms->numa_state);
+ } else {
+ error_setg(errp, "HMAT can't be changed at runtime when QEMU boot"
+ " without setting HMAT latency, bandwidth or memory cache"
+ " information");
+ }
+}
+
+void qmp_set_hmat_cache(NumaHmatCacheOptions *node, Error **errp)
+{
+ MachineState *ms = MACHINE(qdev_get_machine());
+
+ if (ms->numa_state == NULL || ms->numa_state->num_nodes <= 0) {
+ error_setg(errp, "NUMA is not supported");
+ return;
+ }
+
+ if (ms->numa_state->hma_enabled) {
+ parse_numa_hmat_cache(ms, node, 1, errp);
+ hmat_update(ms->numa_state);
+ } else {
+ error_setg(errp, "HMAT can't be changed at runtime when QEMU boot"
+ " without setting HMAT latency, bandwidth or memory cache"
+ " information");
+ }
+}
+
void numa_cpu_pre_plug(const CPUArchId *slot, DeviceState *dev, Error **errp)
{
int node_id = object_property_get_int(OBJECT(dev), "node-id", &error_abort);
@@ -2722,6 +2722,31 @@
'*latency': 'uint16',
'*bandwidth': 'uint16' }}
+##
+# @set-hmat-lb:
+#
+# Set @NumaHmatLBOptions at runtime.
+#
+# Since: 4.1
+#
+# Example:
+# Set the processors in node 0 access memory in node with access-latency 5
+# nanoseconds(base latency is 10):
+#
+# -> { "execute": "set-hmat-lb",
+# "arguments": { "initiator": 0,
+# "target": 1,
+# "hierarchy": "memory",
+# "data-type": "access-latency",
+# "base-lat": 10,
+# "latency": 5 } }
+# <- { "return": {} }
+##
+{ 'command': 'set-hmat-lb', 'boxed': true,
+ 'data': 'NumaHmatLBOptions',
+ 'allow-preconfig': true
+}
+
##
# @HmatCacheAssociativity:
#
@@ -2796,6 +2821,30 @@
'policy': 'HmatCacheWritePolicy',
'line': 'uint16' }}
+##
+# @set-hmat-cache:
+#
+# Set @NumaHmatCacheOptions at runtime.
+#
+# Since: 4.1
+#
+# Example:
+# Set Memory Side Cache Information in node 1:
+#
+# -> { "execute": "set-hmat-cache",
+# "arguments": { "node-id": 1,
+# "size": 0x20000,
+# "total": 3,
+# "level": "direct",
+# "policy": "write-back",
+# "line": 8 } }
+# <- { "return": {} }
+##
+{ 'command': 'set-hmat-cache', 'boxed': true,
+ 'data': 'NumaHmatCacheOptions',
+ 'allow-preconfig': true
+}
+
##
# @HostMemPolicy:
#
Add QMP interface to introduce new HMAT data (including System Locality Latency and Bandwidth Information Structure, Memory Side Cache Information Structure) at runtime. The interface can also replace existing HMAT data. Suggested-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Tao Xu <tao3.xu@intel.com> --- hw/acpi/acpi-stub.c | 7 ++++++ numa.c | 55 +++++++++++++++++++++++++++++++++++++++------ qapi/misc.json | 49 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 104 insertions(+), 7 deletions(-)