[v15,12/12] MAINTAINERS: Add RX

Message ID	20190522142956.41916-13-ysato@users.sourceforge.jp
State	New
Headers	show Return-Path: <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org> sender: PQ4Y-STU) by mail01.asahi-net.or.jp (Postfix) with ESMTPA id 3A9F811DD8A; Wed, 22 May 2019 23:30:11 +0900 (JST) From: Yoshinori Sato <ysato@users.sourceforge.jp> To: qemu-devel@nongnu.org Date: Wed, 22 May 2019 23:29:56 +0900 Message-Id: <20190522142956.41916-13-ysato@users.sourceforge.jp> In-Reply-To: <20190522142956.41916-1-ysato@users.sourceforge.jp> References: <20190522142956.41916-1-ysato@users.sourceforge.jp> Subject: [Qemu-devel] [PATCH v15 12/12] MAINTAINERS: Add RX Precedence: list Cc: peter.maydell@linaro.org, richard.henderson@linaro.org, Yoshinori Sato <ysato@users.sourceforge.jp>, philmd@redhat.com Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>
Series	Add RX archtecture support \| expand [v15,00/12] Add RX archtecture support [v15,01/12] qemu/bitops.h: Add extract8 and extract16 [v15,02/12] hw/registerfields.h: Add 8bit and 16bit register macros. [v15,03/12] target/rx: TCG translation [v15,04/12] target/rx: TCG helper [v15,05/12] target/rx: CPU definition [v15,06/12] target/rx: RX disassembler [v15,07/12] hw/intc: RX62N interrupt controller (ICUa) [v15,08/12] hw/timer: RX62N internal timer modules [v15,09/12] hw/char: RX62N serial communication interface (SCI) [v15,10/12] hw/rx: RX Target hardware definition [v15,11/12] Add rx-softmmu [v15,12/12] MAINTAINERS: Add RX

Message ID

20190522142956.41916-13-ysato@users.sourceforge.jp

State

New

Headers

From: Yoshinori Sato <ysato@users.sourceforge.jp>
To: qemu-devel@nongnu.org
Date: Wed, 22 May 2019 23:29:56 +0900
Message-Id: <20190522142956.41916-13-ysato@users.sourceforge.jp>
In-Reply-To: <20190522142956.41916-1-ysato@users.sourceforge.jp>
References: <20190522142956.41916-1-ysato@users.sourceforge.jp>
Subject: [Qemu-devel] [PATCH v15 12/12] MAINTAINERS: Add RX
Precedence: list
Cc: peter.maydell@linaro.org, richard.henderson@linaro.org,
	Yoshinori Sato <ysato@users.sourceforge.jp>, philmd@redhat.com
Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org
Sender: "Qemu-devel"
	<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>

Series

Add RX archtecture support | expand

Commit Message

Yoshinori Sato May 22, 2019, 2:29 p.m. UTC

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
 MAINTAINERS | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index a6948ebc63..36c4577d6c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -272,6 +272,13 @@  F: include/hw/riscv/
 F: linux-user/host/riscv32/
 F: linux-user/host/riscv64/
 
+RENESAS RX
+M: Yoshinori Sato <ysato@users.sourceforge.jp>
+S: Maintained
+F: target/rx/
+F: hw/rx/
+F: include/hw/rx/
+
 S390
 M: Richard Henderson <rth@twiddle.net>
 M: David Hildenbrand <david@redhat.com>
@@ -1106,6 +1113,20 @@  F: pc-bios/canyonlands.dt[sb]
 F: pc-bios/u-boot-sam460ex-20100605.bin
 F: roms/u-boot-sam460ex
 
+RX Machines
+-----------
+RX-QEMU
+M: Yoshinori Sato <ysato@users.sourceforge.jp>
+S: Maintained
+F: hw/rx/rx-virt.c
+F: hw/intc/rx_icu.c
+F: hw/timer/renesas_*.c
+F: hw/char/renesas_sci.c
+F: include/hw/timer/renesas_*.h
+F: include/hw/char/renesas_sci.h
+F: include/hw/intc/rx_icu.h
+F: default-configs/rx-softmmu.mak
+
 SH4 Machines
 ------------
 R2D

[v15,12/12] MAINTAINERS: Add RX

Commit Message

Patch