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Wed, 12 Dec 2018 17:30:16 +0000 (UTC) From: Laurent Vivier To: qemu-devel@nongnu.org Date: Wed, 12 Dec 2018 18:30:04 +0100 Message-Id: <20181212173007.11407-4-lvivier@redhat.com> In-Reply-To: <20181212173007.11407-1-lvivier@redhat.com> References: <20181212173007.11407-1-lvivier@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Wed, 12 Dec 2018 17:30:18 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 3/6] hw/dma/puv3_intc: Convert from DPRINTF() macro to trace event X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-trivial@nongnu.org, Laurent Vivier , Guan Xuetao , Michael Tokarev , =?utf-8?q?Ph?= =?utf-8?q?ilippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Laurent Vivier --- hw/intc/puv3_intc.c | 13 ++++++------- hw/intc/trace-events | 7 +++++++ 2 files changed, 13 insertions(+), 7 deletions(-) diff --git a/hw/intc/puv3_intc.c b/hw/intc/puv3_intc.c index ef8488aacc..6c1f36bba6 100644 --- a/hw/intc/puv3_intc.c +++ b/hw/intc/puv3_intc.c @@ -10,9 +10,8 @@ */ #include "qemu/osdep.h" #include "hw/sysbus.h" - -#undef DEBUG_PUV3 #include "hw/unicore32/puv3.h" +#include "trace.h" #define TYPE_PUV3_INTC "puv3_intc" #define PUV3_INTC(obj) OBJECT_CHECK(PUV3INTCState, (obj), TYPE_PUV3_INTC) @@ -42,7 +41,7 @@ static void puv3_intc_handler(void *opaque, int irq, int level) { PUV3INTCState *s = opaque; - DPRINTF("irq 0x%x, level 0x%x\n", irq, level); + trace_puv3_intc_handler(irq, level); if (level) { s->reg_ICPR |= (1 << irq); } else { @@ -65,9 +64,9 @@ static uint64_t puv3_intc_read(void *opaque, hwaddr offset, ret = s->reg_ICPR; /* the same value with ICPR */ break; default: - DPRINTF("Bad offset %x\n", (int)offset); + trace_puv3_intc_read_bad(offset); } - DPRINTF("offset 0x%x, value 0x%x\n", offset, ret); + trace_puv3_intc_read(offset, ret); return ret; } @@ -76,7 +75,7 @@ static void puv3_intc_write(void *opaque, hwaddr offset, { PUV3INTCState *s = opaque; - DPRINTF("offset 0x%x, value 0x%x\n", offset, value); + trace_puv3_intc_write(offset, value); switch (offset) { case 0x00: /* INTC_ICLR */ case 0x14: /* INTC_ICCR */ @@ -85,7 +84,7 @@ static void puv3_intc_write(void *opaque, hwaddr offset, s->reg_ICMR = value; break; default: - DPRINTF("Bad offset 0x%x\n", (int)offset); + trace_puv3_intc_write_bad(offset); return; } puv3_intc_update(s); diff --git a/hw/intc/trace-events b/hw/intc/trace-events index 7769869a13..e42d0cfb2d 100644 --- a/hw/intc/trace-events +++ b/hw/intc/trace-events @@ -200,3 +200,10 @@ nvic_sysreg_write(uint64_t addr, uint32_t value, unsigned size) "NVIC sysreg wri heathrow_write(uint64_t addr, unsigned int n, uint64_t value) "0x%"PRIx64" %u: 0x%"PRIx64 heathrow_read(uint64_t addr, unsigned int n, uint64_t value) "0x%"PRIx64" %u: 0x%"PRIx64 heathrow_set_irq(int num, int level) "set_irq: num=0x%02x level=%d" + +# hw/intc/puv3_intc.c +puv3_intc_handler(int irq, int level) "irq 0x%x, level 0x%x" +puv3_intc_read_bad(uint32_t offset) "Bad offset 0x%x" +puv3_intc_read(uint32_t offset, uint32_t value) "offset 0x%x, value 0x%x" +puv3_intc_write(uint32_t offset, uint64_t value) "offset 0x%x, value 0x%" PRIx64 +puv3_intc_write_bad(uint32_t offset) "Bad offset 0x%x"