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s=mail; t=1541502372; bh=LMxXTTNAWH8AGdUZMYt2021rnq5Xws6PAKfpWkpVZSY=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=2ZMjqoDQ8NzJ25TgSEm2vys+x974TPTWqB0oFPma0rkRRPFSEpYhN5rZgqJPOZ90c iCE2Yh8xHZewPAFXpUdO+0l48OwAY4w5T2KVCfNrJDnc87ehE9qpCCBUT3RzlM003N g2zeIPFhyM4Zko50t2qzEwN5VDBAwICDojVoI65Y= Received: from michell-laptop.home.lmichel.fr (lfbn-1-8165-82.w90-112.abo.wanadoo.fr [90.112.74.82]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: luc.michel@greensocs.com) by greensocs.com (Postfix) with ESMTPSA id CA4085C024B; Tue, 6 Nov 2018 12:06:11 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1541502372; bh=LMxXTTNAWH8AGdUZMYt2021rnq5Xws6PAKfpWkpVZSY=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=2ZMjqoDQ8NzJ25TgSEm2vys+x974TPTWqB0oFPma0rkRRPFSEpYhN5rZgqJPOZ90c iCE2Yh8xHZewPAFXpUdO+0l48OwAY4w5T2KVCfNrJDnc87ehE9qpCCBUT3RzlM003N g2zeIPFhyM4Zko50t2qzEwN5VDBAwICDojVoI65Y= From: Luc Michel To: qemu-devel@nongnu.org Date: Tue, 6 Nov 2018 12:05:48 +0100 Message-Id: <20181106110548.4209-17-luc.michel@greensocs.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181106110548.4209-1-luc.michel@greensocs.com> References: <20181106110548.4209-1-luc.michel@greensocs.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 193.104.36.180 Subject: [Qemu-devel] [PATCH v4 16/16] arm/xlnx-zynqmp: put APUs and RPUs in separate CPU clusters X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Eduardo Habkost , alistair@alistair23.me, mark.burton@greensocs.com, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , saipava@xilinx.com, edgari@xilinx.com, qemu-arm@nongnu.org, Luc Michel Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Create two separate CPU clusters for APUs and RPUs. Signed-off-by: Luc Michel --- include/hw/arm/xlnx-zynqmp.h | 3 +++ hw/arm/xlnx-zynqmp.c | 21 +++++++++++++++++---- 2 files changed, 20 insertions(+), 4 deletions(-) diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h index 98f925ab84..591515c760 100644 --- a/include/hw/arm/xlnx-zynqmp.h +++ b/include/hw/arm/xlnx-zynqmp.h @@ -29,10 +29,11 @@ #include "hw/dma/xlnx_dpdma.h" #include "hw/dma/xlnx-zdma.h" #include "hw/display/xlnx_dp.h" #include "hw/intc/xlnx-zynqmp-ipi.h" #include "hw/timer/xlnx-zynqmp-rtc.h" +#include "hw/cpu/cluster.h" #define TYPE_XLNX_ZYNQMP "xlnx,zynqmp" #define XLNX_ZYNQMP(obj) OBJECT_CHECK(XlnxZynqMPState, (obj), \ TYPE_XLNX_ZYNQMP) @@ -75,10 +76,12 @@ typedef struct XlnxZynqMPState { /*< private >*/ DeviceState parent_obj; /*< public >*/ + CPUClusterState apu_cluster; + CPUClusterState rpu_cluster; ARMCPU apu_cpu[XLNX_ZYNQMP_NUM_APU_CPUS]; ARMCPU rpu_cpu[XLNX_ZYNQMP_NUM_RPU_CPUS]; GICState gic; MemoryRegion gic_mr[XLNX_ZYNQMP_GIC_REGIONS][XLNX_ZYNQMP_GIC_ALIASES]; diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index c195040350..42a138074c 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -176,16 +176,22 @@ static void xlnx_zynqmp_create_rpu(XlnxZynqMPState *s, const char *boot_cpu, { Error *err = NULL; int i; int num_rpus = MIN(smp_cpus - XLNX_ZYNQMP_NUM_APU_CPUS, XLNX_ZYNQMP_NUM_RPU_CPUS); + object_initialize_child(OBJECT(s), "rpu-cluster", &s->rpu_cluster, + sizeof(s->rpu_cluster), TYPE_CPU_CLUSTER, + &error_abort, NULL); + + qdev_init_nofail(DEVICE(&s->rpu_cluster)); + for (i = 0; i < num_rpus; i++) { char *name; object_initialize(&s->rpu_cpu[i], sizeof(s->rpu_cpu[i]), "cortex-r5f-" TYPE_ARM_CPU); - object_property_add_child(OBJECT(s), "rpu-cpu[*]", + object_property_add_child(OBJECT(&s->rpu_cluster), "rpu-cpu[*]", OBJECT(&s->rpu_cpu[i]), &error_abort); name = object_get_canonical_path_component(OBJECT(&s->rpu_cpu[i])); if (strcmp(name, boot_cpu)) { /* Secondary CPUs start in PSCI powered-down state */ @@ -211,14 +217,19 @@ static void xlnx_zynqmp_init(Object *obj) { XlnxZynqMPState *s = XLNX_ZYNQMP(obj); int i; int num_apus = MIN(smp_cpus, XLNX_ZYNQMP_NUM_APU_CPUS); + object_initialize_child(obj, "apu-cluster", &s->apu_cluster, + sizeof(s->apu_cluster), TYPE_CPU_CLUSTER, + &error_abort, NULL); + for (i = 0; i < num_apus; i++) { - object_initialize_child(obj, "apu-cpu[*]", &s->apu_cpu[i], - sizeof(s->apu_cpu[i]), - "cortex-a53-" TYPE_ARM_CPU, &error_abort, NULL); + object_initialize_child(OBJECT(&s->apu_cluster), "apu-cpu[*]", + &s->apu_cpu[i], sizeof(s->apu_cpu[i]), + "cortex-a53-" TYPE_ARM_CPU, &error_abort, + NULL); } sysbus_init_child_obj(obj, "gic", &s->gic, sizeof(s->gic), gic_class_name()); @@ -331,10 +342,12 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) qdev_prop_set_uint32(DEVICE(&s->gic), "num-cpu", num_apus); qdev_prop_set_bit(DEVICE(&s->gic), "has-security-extensions", s->secure); qdev_prop_set_bit(DEVICE(&s->gic), "has-virtualization-extensions", s->virt); + qdev_init_nofail(DEVICE(&s->apu_cluster)); + /* Realize APUs before realizing the GIC. KVM requires this. */ for (i = 0; i < num_apus; i++) { char *name; object_property_set_int(OBJECT(&s->apu_cpu[i]), QEMU_PSCI_CONDUIT_SMC,