From patchwork Mon Jun 11 10:49:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 927612 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=vivier.eu Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41493Z1R4kz9rxs for ; Mon, 11 Jun 2018 20:58:18 +1000 (AEST) Received: from localhost ([::1]:47694 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fSKWd-0000OL-U9 for incoming@patchwork.ozlabs.org; Mon, 11 Jun 2018 06:58:15 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56339) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fSKOk-0002X1-26 for qemu-devel@nongnu.org; Mon, 11 Jun 2018 06:50:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fSKOf-0000mp-OT for qemu-devel@nongnu.org; Mon, 11 Jun 2018 06:50:06 -0400 Received: from mout.kundenserver.de ([212.227.126.130]:36959) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fSKOf-0000lA-96 for qemu-devel@nongnu.org; Mon, 11 Jun 2018 06:50:01 -0400 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue003 [212.227.15.167]) with ESMTPSA (Nemesis) id 0LeyRX-1g2Vxx3pOx-00qhgo; Mon, 11 Jun 2018 12:49:51 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Mon, 11 Jun 2018 12:49:33 +0200 Message-Id: <20180611104935.20499-8-laurent@vivier.eu> X-Mailer: git-send-email 2.14.4 In-Reply-To: <20180611104935.20499-1-laurent@vivier.eu> References: <20180611104935.20499-1-laurent@vivier.eu> X-Provags-ID: V03:K1:2jkxnmMzSOFDvAZkRGyfgWULs/6xV8czI9ehYuojr152/CZ1gNy pNvMejcMxCiRgiPfiQlz7/VmzJ6Ybd1Yg7cnQ2TxTO8gId7z73LFOW8SsYrsP7i21WcSfuk fx8PDM60Pf1XS4kQDToEziBeIFTF9/WRAnK/YiM1AmRkJwIAzuXTfVcogM+Z4/4yRkE8PdM z9FRRwx5oXyiFwe0PvXFQ== X-UI-Out-Filterresults: notjunk:1; V01:K0:SouSPykwuOU=:F4LmCDJnXJPoxGnFMgBPsK 4eubJrP/kwRsud5Sb6n9mipdr2CL9u5NbZ+BIs4dRzJGt2ZSsgXFpzqj/PRp/GIxDZh7e+foI 1ZvfaluXKaFlmQLm5gOa5z2Atar94puRV5zqShXvt+OI0rNyrycqXwavtHkrmYEX6bz/Bf596 nWerOslpKbRsuFjPdV+if0b/MRJ58M0hxbYqmTO64BmRhTfbpEqAkltS3akYhdbnXDq7kXMRa 1Jihnh5D0e50HqUHdlUuxcGy/CIoeTVWOCn5j4lszAxs/6w9Bxwces+0a7vILVGBOXnQMSFit 7fGsEI/uBFPg4Xz8NzmcmKbYeL47Q4j8qChghnHs35mSJo+NKHIIvwxlvBxVy5Mr6nzOmnr5u QarEyumNWnEHsn9d0asJXtIbp9QfMTwQtjFM3BTBdxUDPejIZJmJVHu/fVOFQNVt4+eLgRj7y 5BUwMiiI14P64xBO6moZgF5GuGsOEVE+Y+Gr9QFURW0X0o/ALRxK8BakBT6jQBeyaTgdAm75P 8mpJaYT5CW7icVk0FG3KxHWszeKFwiy62NbHypcu//hRFNO3VjcfCxVpUHmebt+FKicsvjS5c qNJ1hphRspN85skT/A6XBOT3CpXRPDfL0uxuGiT7nrFyVtihsMYPvZtgewozp4llP5F8SvTWl VnuZi4GyiD1frg/D4ZQcZ0Jsbdfx6bDrxpJeQ4vxjk/gtNKLqGM/kKsuLP9gV8pU+FkA= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 212.227.126.130 Subject: [Qemu-devel] [PULL 7/9] target/m68k: Convert to TranslatorOps X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Riku Voipio , Richard Henderson , Laurent Vivier Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Signed-off-by: Richard Henderson Message-Id: <20180512050250.12774-8-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier --- target/m68k/translate.c | 180 +++++++++++++++++++++++------------------------- 1 file changed, 88 insertions(+), 92 deletions(-) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 12a74b0b59..62a96bedcd 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -6059,113 +6059,109 @@ static void disas_m68k_insn(CPUM68KState * env, DisasContext *s) do_release(s); } -/* generate intermediate code for basic block 'tb'. */ -void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) +static void m68k_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cpu) { - CPUM68KState *env = cs->env_ptr; - DisasContext dc1, *dc = &dc1; - target_ulong pc_start; - int pc_offset; - int num_insns; - int max_insns; - - /* generate intermediate code */ - pc_start = tb->pc; - - dc->base.tb = tb; + DisasContext *dc = container_of(dcbase, DisasContext, base); + CPUM68KState *env = cpu->env_ptr; dc->env = env; - dc->base.is_jmp = DISAS_NEXT; - dc->pc = pc_start; + dc->pc = dc->base.pc_first; dc->cc_op = CC_OP_DYNAMIC; dc->cc_op_synced = 1; - dc->base.singlestep_enabled = cs->singlestep_enabled; dc->done_mac = 0; dc->writeback_mask = 0; - num_insns = 0; - max_insns = tb_cflags(tb) & CF_COUNT_MASK; - if (max_insns == 0) { - max_insns = CF_COUNT_MASK; - } - if (max_insns > TCG_MAX_INSNS) { - max_insns = TCG_MAX_INSNS; - } - init_release_array(dc); +} - gen_tb_start(tb); - do { - pc_offset = dc->pc - pc_start; - tcg_gen_insn_start(dc->pc, dc->cc_op); - num_insns++; - - if (unlikely(cpu_breakpoint_test(cs, dc->pc, BP_ANY))) { - gen_exception(dc, dc->pc, EXCP_DEBUG); - /* The address covered by the breakpoint must be included in - [tb->pc, tb->pc + tb->size) in order to for it to be - properly cleared -- thus we increment the PC here so that - the logic setting tb->size below does the right thing. */ - dc->pc += 2; - break; - } +static void m68k_tr_tb_start(DisasContextBase *dcbase, CPUState *cpu) +{ +} - if (num_insns == max_insns && (tb_cflags(tb) & CF_LAST_IO)) { - gen_io_start(); - } +static void m68k_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu) +{ + DisasContext *dc = container_of(dcbase, DisasContext, base); + tcg_gen_insn_start(dc->base.pc_next, dc->cc_op); +} - dc->base.pc_next = dc->pc; - disas_m68k_insn(env, dc); - } while (!dc->base.is_jmp && !tcg_op_buf_full() && - !cs->singlestep_enabled && - !singlestep && - (pc_offset) < (TARGET_PAGE_SIZE - 32) && - num_insns < max_insns); - - if (tb_cflags(tb) & CF_LAST_IO) - gen_io_end(); - if (unlikely(cs->singlestep_enabled)) { - /* Make sure the pc is updated, and raise a debug exception. */ - if (!dc->base.is_jmp) { - update_cc_op(dc); - tcg_gen_movi_i32(QREG_PC, dc->pc); - } +static bool m68k_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cpu, + const CPUBreakpoint *bp) +{ + DisasContext *dc = container_of(dcbase, DisasContext, base); + + gen_exception(dc, dc->base.pc_next, EXCP_DEBUG); + /* The address covered by the breakpoint must be included in + [tb->pc, tb->pc + tb->size) in order to for it to be + properly cleared -- thus we increment the PC here so that + the logic setting tb->size below does the right thing. */ + dc->base.pc_next += 2; + + return true; +} + +static void m68k_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) +{ + DisasContext *dc = container_of(dcbase, DisasContext, base); + + disas_m68k_insn(cpu->env_ptr, dc); + dc->base.pc_next = dc->pc; + + if (dc->base.is_jmp == DISAS_NEXT + && dc->pc - dc->base.pc_first >= TARGET_PAGE_SIZE - 32) { + dc->base.is_jmp = DISAS_TOO_MANY; + } +} + +static void m68k_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu) +{ + DisasContext *dc = container_of(dcbase, DisasContext, base); + + if (dc->base.is_jmp == DISAS_NORETURN) { + return; + } + if (dc->base.singlestep_enabled) { gen_helper_raise_exception(cpu_env, tcg_const_i32(EXCP_DEBUG)); - } else { - switch (dc->base.is_jmp) { - case DISAS_NEXT: - update_cc_op(dc); - gen_jmp_tb(dc, 0, dc->pc); - break; - case DISAS_JUMP: - /* We updated CC_OP and PC in gen_jmp/gen_jmp_im. */ - tcg_gen_lookup_and_goto_ptr(); - break; - default: - case DISAS_EXIT: - /* We updated CC_OP and PC in gen_exit_tb, but also modified - other state that may require returning to the main loop. */ - tcg_gen_exit_tb(NULL, 0); - break; - case DISAS_NORETURN: - /* nothing more to generate */ - break; - } + return; } - gen_tb_end(tb, num_insns); -#ifdef DEBUG_DISAS - if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM) - && qemu_log_in_addr_range(pc_start)) { - qemu_log_lock(); - qemu_log("----------------\n"); - qemu_log("IN: %s\n", lookup_symbol(pc_start)); - log_target_disas(cs, pc_start, dc->pc - pc_start); - qemu_log("\n"); - qemu_log_unlock(); + switch (dc->base.is_jmp) { + case DISAS_TOO_MANY: + update_cc_op(dc); + gen_jmp_tb(dc, 0, dc->pc); + break; + case DISAS_JUMP: + /* We updated CC_OP and PC in gen_jmp/gen_jmp_im. */ + tcg_gen_lookup_and_goto_ptr(); + break; + case DISAS_EXIT: + /* We updated CC_OP and PC in gen_exit_tb, but also modified + other state that may require returning to the main loop. */ + tcg_gen_exit_tb(NULL, 0); + break; + default: + g_assert_not_reached(); } -#endif - tb->size = dc->pc - pc_start; - tb->icount = num_insns; +} + +static void m68k_tr_disas_log(const DisasContextBase *dcbase, CPUState *cpu) +{ + qemu_log("IN: %s\n", lookup_symbol(dcbase->pc_first)); + log_target_disas(cpu, dcbase->pc_first, dcbase->tb->size); +} + +static const TranslatorOps m68k_tr_ops = { + .init_disas_context = m68k_tr_init_disas_context, + .tb_start = m68k_tr_tb_start, + .insn_start = m68k_tr_insn_start, + .breakpoint_check = m68k_tr_breakpoint_check, + .translate_insn = m68k_tr_translate_insn, + .tb_stop = m68k_tr_tb_stop, + .disas_log = m68k_tr_disas_log, +}; + +void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb) +{ + DisasContext dc; + translator_loop(&m68k_tr_ops, &dc.base, cpu, tb); } static double floatx80_to_double(CPUM68KState *env, uint16_t high, uint64_t low)