From patchwork Wed Apr 11 18:56:49 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 897401 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=vivier.eu Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 40Lvf401Rlz9rxs for ; Thu, 12 Apr 2018 05:45:32 +1000 (AEST) Received: from localhost ([::1]:51135 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f6LgQ-0006t4-30 for incoming@patchwork.ozlabs.org; Wed, 11 Apr 2018 15:45:30 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38254) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f6KwG-0006If-Si for qemu-devel@nongnu.org; Wed, 11 Apr 2018 14:57:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1f6KwD-00082q-VF for qemu-devel@nongnu.org; Wed, 11 Apr 2018 14:57:48 -0400 Received: from mout.kundenserver.de ([217.72.192.74]:47917) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1f6Kw6-0007sk-1k; Wed, 11 Apr 2018 14:57:38 -0400 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue105 [212.227.15.183]) with ESMTPSA (Nemesis) id 0MXXx0-1f0EoX35EM-00WURi; Wed, 11 Apr 2018 20:57:24 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Wed, 11 Apr 2018 20:56:49 +0200 Message-Id: <20180411185651.21351-18-laurent@vivier.eu> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180411185651.21351-1-laurent@vivier.eu> References: <20180411185651.21351-1-laurent@vivier.eu> X-Provags-ID: V03:K1:l4qdRb9BXhWZoMzHSSXml+zMZ0b9Pyr2FEuYmuJUDlBvTvR+3LB Pz/87GVFM8/boA5fhiZhboI5Awzs8W/aonJLmojAz4KwcQKWxRGS4WZvsNjHr9yibnM+l2N DjSr8KCn2vaqdwhXJnFdHTfpDCulTkoKbVUh+RWWLZ7/ASg7Qp5ZaYGx4uCuOaFsALwNKLi h1a6McfkOaLRpLdH+q1cA== X-UI-Out-Filterresults: notjunk:1; V01:K0:6UcSnwSgOAI=:aO2ahn8NZu8JG8Km+2Adtq rhNpJrEX6e1gXj99JNOVY5Px2HcC+SKXc3GzKODkfbMvg8KBYSwAT+hwSLpvFs5Uh9jkGpYQd RouPZSG04O4AcnTA8tFus+A6egN4EEbTmF3Ol4+/l2WiqWaCLUsGCY8QjsRlhUvgTQcklAeMR KDDSQx2kQrnBiOGLvXIxKEd/PNoqGIBXJx3aPGVOEL+6Qk+6A7sHjvTemunnjk4w+sNA0NJEP bzgiTE0RKjYgQrWcIn6L+UPTbz2K2nNvTJrd9u5GQ6KtSHlLSW00qFAarcyBpLgP2ovRW/NZ6 PshYps8S4PHv746ESZRR2Wyp9NJj1r86QLpBsDELyVfaAlosTDGnSVWHDXbLL0ID583oj6Nx4 b5Ub+PVuRR5D8bAxDTCJ0LMIgf6Q+5cuEG/NQyxXRaBrR052v9ODkPmpztHXpY98pDrLPZj8O s9TMwxRCtwwhQdpjpsWPRD4uY2hxK2w2GXMNsnCbp0fspgdtGzcSWngrhcinLhh+uMt94Tp1T E1DhQrZ7+mbKAkYakfspB+k8vcq7kvt8PpOs21HkVzMhvXD0bw3d6njtdaoJZUmBYgpDTqspD UjG60O+/PRG1d36fxh+o3FrELGeG+F1xzMSMC6eGdImiv+zTKKcA40BYHzWqg/BOVdM/GOWit /FGRT1Wsw8fY3nAlwk8XOzZBI58bH1p2TNDhEc6Qbc+khZk+LzDK0gXMVwDi+y1mKUvVXUNcy K5cg1uNNM1ClLcyVkwdXORL/TzWqPA4jLJtrug== X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 217.72.192.74 Subject: [Qemu-devel] [PATCH for 2.13 v2 17/19] linux-user: move riscv cpu loop to riscv directory X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Cornelia Huck , Riku Voipio , Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Laurent Vivier , qemu-s390x@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" No code change, only move code from main.c to riscv/cpu_loop.c. Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson Reviewed-by: Michael Clark Reviewed-by: Philippe Mathieu-Daudé --- linux-user/main.c | 101 +------------------------------------------- linux-user/riscv/cpu_loop.c | 92 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 93 insertions(+), 100 deletions(-) diff --git a/linux-user/main.c b/linux-user/main.c index 32922110f1..834ec0bfe5 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -149,100 +149,6 @@ void fork_end(int child) } } -#ifdef TARGET_RISCV - -void cpu_loop(CPURISCVState *env) -{ - CPUState *cs = CPU(riscv_env_get_cpu(env)); - int trapnr, signum, sigcode; - target_ulong sigaddr; - target_ulong ret; - - for (;;) { - cpu_exec_start(cs); - trapnr = cpu_exec(cs); - cpu_exec_end(cs); - process_queued_cpu_work(cs); - - signum = 0; - sigcode = 0; - sigaddr = 0; - - switch (trapnr) { - case EXCP_INTERRUPT: - /* just indicate that signals should be handled asap */ - break; - case EXCP_ATOMIC: - cpu_exec_step_atomic(cs); - break; - case RISCV_EXCP_U_ECALL: - env->pc += 4; - if (env->gpr[xA7] == TARGET_NR_arch_specific_syscall + 15) { - /* riscv_flush_icache_syscall is a no-op in QEMU as - self-modifying code is automatically detected */ - ret = 0; - } else { - ret = do_syscall(env, - env->gpr[xA7], - env->gpr[xA0], - env->gpr[xA1], - env->gpr[xA2], - env->gpr[xA3], - env->gpr[xA4], - env->gpr[xA5], - 0, 0); - } - if (ret == -TARGET_ERESTARTSYS) { - env->pc -= 4; - } else if (ret != -TARGET_QEMU_ESIGRETURN) { - env->gpr[xA0] = ret; - } - if (cs->singlestep_enabled) { - goto gdbstep; - } - break; - case RISCV_EXCP_ILLEGAL_INST: - signum = TARGET_SIGILL; - sigcode = TARGET_ILL_ILLOPC; - break; - case RISCV_EXCP_BREAKPOINT: - signum = TARGET_SIGTRAP; - sigcode = TARGET_TRAP_BRKPT; - sigaddr = env->pc; - break; - case RISCV_EXCP_INST_PAGE_FAULT: - case RISCV_EXCP_LOAD_PAGE_FAULT: - case RISCV_EXCP_STORE_PAGE_FAULT: - signum = TARGET_SIGSEGV; - sigcode = TARGET_SEGV_MAPERR; - break; - case EXCP_DEBUG: - gdbstep: - signum = gdb_handlesig(cs, TARGET_SIGTRAP); - sigcode = TARGET_TRAP_BRKPT; - break; - default: - EXCP_DUMP(env, "\nqemu: unhandled CPU exception %#x - aborting\n", - trapnr); - exit(EXIT_FAILURE); - } - - if (signum) { - target_siginfo_t info = { - .si_signo = signum, - .si_errno = 0, - .si_code = sigcode, - ._sifields._sigfault._addr = sigaddr - }; - queue_signal(env, info.si_signo, QEMU_SI_KILL, &info); - } - - process_pending_signals(env); - } -} - -#endif /* TARGET_RISCV */ - #ifdef TARGET_HPPA static abi_ulong hppa_lws(CPUHPPAState *env) @@ -1322,12 +1228,7 @@ int main(int argc, char **argv, char **envp) target_cpu_copy_regs(env, regs); -#if defined(TARGET_RISCV) - { - env->pc = regs->sepc; - env->gpr[xSP] = regs->sp; - } -#elif defined(TARGET_HPPA) +#if defined(TARGET_HPPA) { int i; for (i = 1; i < 32; i++) { diff --git a/linux-user/riscv/cpu_loop.c b/linux-user/riscv/cpu_loop.c index b7700a5561..f137d39d7e 100644 --- a/linux-user/riscv/cpu_loop.c +++ b/linux-user/riscv/cpu_loop.c @@ -21,6 +21,98 @@ #include "qemu.h" #include "cpu_loop-common.h" +void cpu_loop(CPURISCVState *env) +{ + CPUState *cs = CPU(riscv_env_get_cpu(env)); + int trapnr, signum, sigcode; + target_ulong sigaddr; + target_ulong ret; + + for (;;) { + cpu_exec_start(cs); + trapnr = cpu_exec(cs); + cpu_exec_end(cs); + process_queued_cpu_work(cs); + + signum = 0; + sigcode = 0; + sigaddr = 0; + + switch (trapnr) { + case EXCP_INTERRUPT: + /* just indicate that signals should be handled asap */ + break; + case EXCP_ATOMIC: + cpu_exec_step_atomic(cs); + break; + case RISCV_EXCP_U_ECALL: + env->pc += 4; + if (env->gpr[xA7] == TARGET_NR_arch_specific_syscall + 15) { + /* riscv_flush_icache_syscall is a no-op in QEMU as + self-modifying code is automatically detected */ + ret = 0; + } else { + ret = do_syscall(env, + env->gpr[xA7], + env->gpr[xA0], + env->gpr[xA1], + env->gpr[xA2], + env->gpr[xA3], + env->gpr[xA4], + env->gpr[xA5], + 0, 0); + } + if (ret == -TARGET_ERESTARTSYS) { + env->pc -= 4; + } else if (ret != -TARGET_QEMU_ESIGRETURN) { + env->gpr[xA0] = ret; + } + if (cs->singlestep_enabled) { + goto gdbstep; + } + break; + case RISCV_EXCP_ILLEGAL_INST: + signum = TARGET_SIGILL; + sigcode = TARGET_ILL_ILLOPC; + break; + case RISCV_EXCP_BREAKPOINT: + signum = TARGET_SIGTRAP; + sigcode = TARGET_TRAP_BRKPT; + sigaddr = env->pc; + break; + case RISCV_EXCP_INST_PAGE_FAULT: + case RISCV_EXCP_LOAD_PAGE_FAULT: + case RISCV_EXCP_STORE_PAGE_FAULT: + signum = TARGET_SIGSEGV; + sigcode = TARGET_SEGV_MAPERR; + break; + case EXCP_DEBUG: + gdbstep: + signum = gdb_handlesig(cs, TARGET_SIGTRAP); + sigcode = TARGET_TRAP_BRKPT; + break; + default: + EXCP_DUMP(env, "\nqemu: unhandled CPU exception %#x - aborting\n", + trapnr); + exit(EXIT_FAILURE); + } + + if (signum) { + target_siginfo_t info = { + .si_signo = signum, + .si_errno = 0, + .si_code = sigcode, + ._sifields._sigfault._addr = sigaddr + }; + queue_signal(env, info.si_signo, QEMU_SI_KILL, &info); + } + + process_pending_signals(env); + } +} + void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) { + env->pc = regs->sepc; + env->gpr[xSP] = regs->sp; }