From patchwork Sun Mar 4 17:32:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 881203 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=vivier.eu Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3zvVZ24jKvz9sWQ for ; Mon, 5 Mar 2018 04:35:54 +1100 (AEDT) Received: from localhost ([::1]:45628 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1esXY8-0004vD-Lo for incoming@patchwork.ozlabs.org; Sun, 04 Mar 2018 12:35:52 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57146) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1esXVO-0003FC-Gf for qemu-devel@nongnu.org; Sun, 04 Mar 2018 12:33:04 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1esXVK-0006PF-GP for qemu-devel@nongnu.org; Sun, 04 Mar 2018 12:33:02 -0500 Received: from mout.kundenserver.de ([217.72.192.73]:45953) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1esXVK-0006Nb-3E for qemu-devel@nongnu.org; Sun, 04 Mar 2018 12:32:58 -0500 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue105 [212.227.15.183]) with ESMTPSA (Nemesis) id 0Mgw8O-1f5pBj3FwW-00M0xx; Sun, 04 Mar 2018 18:32:44 +0100 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Sun, 4 Mar 2018 18:32:29 +0100 Message-Id: <20180304173232.22814-3-laurent@vivier.eu> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180304173232.22814-1-laurent@vivier.eu> References: <20180304173232.22814-1-laurent@vivier.eu> X-Provags-ID: V03:K0:m4EvCc9MGfB1CoVEf/5/GET9PCuVATzSuaZGxnQ0xhTSo589Zen EqTFsQiIMkgou2Fcf3dxW8zoPauMkxC3eLgzpaE0/z//5EdbyvAEjFZ8QypzvLQAAwWBDOw kT92dndm+zd4cUZHN3Ly2z0dmbSuUzRPlthE5Pz4e9SUvcRb2TiWulDJhexDzQnR4FFOVD6 NXZPbYMntR3Bo1bI8tx0w== X-UI-Out-Filterresults: notjunk:1; V01:K0:skL40zPCU9Q=:0RllrvngIW5G8oecNLRW9J nhoQeq+nypOOXY8SODW4tTjNHcwX8SBd8itkIMIzbV2VnlTUsaRrJOCokYEwH9Vlz+rqCyuUs T2QDpo4H/aJCa6UKBJsNnQKyWxSrBRg85Cm0/jmSA149/m2NlBLBE0x8MLuEdcQ27Y4ZDUre9 BAoSkWYEb7r04A/kZPfh6Xo6RvA/8TEHbKeLE/eGgxHgFGVr5u1rGi6sl66KhKBD7GC3Cfes2 7Rf7SArvYDcRMLFVcoNV+DCDvYp4ZrH1T4XehuVTfDT9l7pa5k6v+lcTj66APSj4tpWPgYUy+ N+wIKRhcDf2ZsuFZrFz2MpB1J/4HQb2r72Va6c+RCYtkbUqS0u9jIU1ltlo459q4qGfFNgfNs KmrFI9kZNSqCKtSYflXb7G62YadU7xuQKbgKRAD7tl7nBAGBjVha8delzc6Ap/jARRivDA20l 4k5ILjGzxHFOnfdLm8CCOQTlr8p96m++4IssxfqIWfrM6x31QVzvRCeGovqO5b3/EEXRkWbgd 5vFzYN/UWcA0ZcB+nSEahgbPC1oofWhLSTHsHBCV3oDBxLQ0i38vtg3HB4e7ScPBuLH119OwC dVZHJSRs1sVjgii+3bFzeeeFJZv5G6r8xXJXcW/GoNZ6oggiiS6dTM3TXKhSwL3BRk+zLxHk+ DmuolEt/Uz+FKstoynAvmlJZM4833Lf1qDooch2D3ezR6rUI9I81//Zr3SdFFFe42qDRrF+AL 9QcTycZSJITeLfc3FssiiWmKDdhvyKxFHlmGxQ== X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 217.72.192.73 Subject: [Qemu-devel] [PULL 2/5] softfloat: export some functions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Aurelien Jarno Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Move fpu/softfloat-macros.h to include/fpu/ Export floatx80 functions to be used by target floatx80 specific implementations. Exports: propagateFloatx80NaN(), extractFloatx80Frac(), extractFloatx80Exp(), extractFloatx80Sign(), normalizeFloatx80Subnormal(), packFloatx80(), roundAndPackFloatx80(), normalizeRoundAndPackFloatx80() Also exports packFloat32() that will be used to implement m68k fsinh, fcos, fsin, ftan operations. Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson Message-Id: <20180224201802.911-2-laurent@vivier.eu> --- fpu/softfloat-specialize.h | 3 +- fpu/softfloat.c | 91 +++--------------------- {fpu => include/fpu}/softfloat-macros.h | 10 +-- include/fpu/softfloat.h | 121 ++++++++++++++++++++++++++++++++ 4 files changed, 137 insertions(+), 88 deletions(-) rename {fpu => include/fpu}/softfloat-macros.h (98%) diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index e81ca001e1..46126e9e0a 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -1011,8 +1011,7 @@ static floatx80 commonNaNToFloatx80(commonNaNT a, float_status *status) | `b' is a signaling NaN, the invalid exception is raised. *----------------------------------------------------------------------------*/ -static floatx80 propagateFloatx80NaN(floatx80 a, floatx80 b, - float_status *status) +floatx80 propagateFloatx80NaN(floatx80 a, floatx80 b, float_status *status) { flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN; flag aIsLargerSignificand; diff --git a/fpu/softfloat.c b/fpu/softfloat.c index e7fb0d357a..fb4853682e 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -93,7 +93,7 @@ this code that are retained. | division and square root approximations. (Can be specialized to target if | desired.) *----------------------------------------------------------------------------*/ -#include "softfloat-macros.h" +#include "fpu/softfloat-macros.h" /*---------------------------------------------------------------------------- | Functions and definitions to determine: (1) whether tininess for underflow @@ -2192,25 +2192,6 @@ static void } -/*---------------------------------------------------------------------------- -| Packs the sign `zSign', exponent `zExp', and significand `zSig' into a -| single-precision floating-point value, returning the result. After being -| shifted into the proper positions, the three fields are simply added -| together to form the result. This means that any integer portion of `zSig' -| will be added into the exponent. Since a properly normalized significand -| will have an integer portion equal to 1, the `zExp' input should be 1 less -| than the desired result exponent whenever `zSig' is a complete, normalized -| significand. -*----------------------------------------------------------------------------*/ - -static inline float32 packFloat32(flag zSign, int zExp, uint32_t zSig) -{ - - return make_float32( - ( ( (uint32_t) zSign )<<31 ) + ( ( (uint32_t) zExp )<<23 ) + zSig); - -} - /*---------------------------------------------------------------------------- | Takes an abstract floating-point value having sign `zSign', exponent `zExp', | and significand `zSig', and returns the proper single-precision floating- @@ -2490,42 +2471,6 @@ static float64 } -/*---------------------------------------------------------------------------- -| Returns the fraction bits of the extended double-precision floating-point -| value `a'. -*----------------------------------------------------------------------------*/ - -static inline uint64_t extractFloatx80Frac( floatx80 a ) -{ - - return a.low; - -} - -/*---------------------------------------------------------------------------- -| Returns the exponent bits of the extended double-precision floating-point -| value `a'. -*----------------------------------------------------------------------------*/ - -static inline int32_t extractFloatx80Exp( floatx80 a ) -{ - - return a.high & 0x7FFF; - -} - -/*---------------------------------------------------------------------------- -| Returns the sign bit of the extended double-precision floating-point value -| `a'. -*----------------------------------------------------------------------------*/ - -static inline flag extractFloatx80Sign( floatx80 a ) -{ - - return a.high>>15; - -} - /*---------------------------------------------------------------------------- | Normalizes the subnormal extended double-precision floating-point value | represented by the denormalized significand `aSig'. The normalized exponent @@ -2533,30 +2478,14 @@ static inline flag extractFloatx80Sign( floatx80 a ) | `zSigPtr', respectively. *----------------------------------------------------------------------------*/ -static void - normalizeFloatx80Subnormal( uint64_t aSig, int32_t *zExpPtr, uint64_t *zSigPtr ) +void normalizeFloatx80Subnormal(uint64_t aSig, int32_t *zExpPtr, + uint64_t *zSigPtr) { int8_t shiftCount; shiftCount = countLeadingZeros64( aSig ); *zSigPtr = aSig<> 15; +} + +/*---------------------------------------------------------------------------- +| Packs the sign `zSign', exponent `zExp', and significand `zSig' into an +| extended double-precision floating-point value, returning the result. +*----------------------------------------------------------------------------*/ + +static inline floatx80 packFloatx80(flag zSign, int32_t zExp, uint64_t zSig) +{ + floatx80 z; + + z.low = zSig; + z.high = (((uint16_t)zSign) << 15) + zExp; + return z; +} + +/*---------------------------------------------------------------------------- +| Normalizes the subnormal extended double-precision floating-point value +| represented by the denormalized significand `aSig'. The normalized exponent +| and significand are stored at the locations pointed to by `zExpPtr' and +| `zSigPtr', respectively. +*----------------------------------------------------------------------------*/ + +void normalizeFloatx80Subnormal(uint64_t aSig, int32_t *zExpPtr, + uint64_t *zSigPtr); + +/*---------------------------------------------------------------------------- +| Takes two extended double-precision floating-point values `a' and `b', one +| of which is a NaN, and returns the appropriate NaN result. If either `a' or +| `b' is a signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ + +floatx80 propagateFloatx80NaN(floatx80 a, floatx80 b, float_status *status); + +/*---------------------------------------------------------------------------- +| Takes an abstract floating-point value having sign `zSign', exponent `zExp', +| and extended significand formed by the concatenation of `zSig0' and `zSig1', +| and returns the proper extended double-precision floating-point value +| corresponding to the abstract input. Ordinarily, the abstract value is +| rounded and packed into the extended double-precision format, with the +| inexact exception raised if the abstract input cannot be represented +| exactly. However, if the abstract value is too large, the overflow and +| inexact exceptions are raised and an infinity or maximal finite value is +| returned. If the abstract value is too small, the input value is rounded to +| a subnormal number, and the underflow and inexact exceptions are raised if +| the abstract input cannot be represented exactly as a subnormal extended +| double-precision floating-point number. +| If `roundingPrecision' is 32 or 64, the result is rounded to the same +| number of bits as single or double precision, respectively. Otherwise, the +| result is rounded to the full precision of the extended double-precision +| format. +| The input significand must be normalized or smaller. If the input +| significand is not normalized, `zExp' must be 0; in that case, the result +| returned is a subnormal number, and it must not require rounding. The +| handling of underflow and overflow follows the IEC/IEEE Standard for Binary +| Floating-Point Arithmetic. +*----------------------------------------------------------------------------*/ + +floatx80 roundAndPackFloatx80(int8_t roundingPrecision, flag zSign, + int32_t zExp, uint64_t zSig0, uint64_t zSig1, + float_status *status); + +/*---------------------------------------------------------------------------- +| Takes an abstract floating-point value having sign `zSign', exponent +| `zExp', and significand formed by the concatenation of `zSig0' and `zSig1', +| and returns the proper extended double-precision floating-point value +| corresponding to the abstract input. This routine is just like +| `roundAndPackFloatx80' except that the input significand does not have to be +| normalized. +*----------------------------------------------------------------------------*/ + +floatx80 normalizeRoundAndPackFloatx80(int8_t roundingPrecision, + flag zSign, int32_t zExp, + uint64_t zSig0, uint64_t zSig1, + float_status *status); + /*---------------------------------------------------------------------------- | The pattern for a default generated extended double-precision NaN. *----------------------------------------------------------------------------*/