From patchwork Mon Jan 29 12:56:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Hildenbrand X-Patchwork-Id: 867117 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3zVVC15xJTz9s1h for ; Tue, 30 Jan 2018 00:06:37 +1100 (AEDT) Received: from localhost ([::1]:36132 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eg98t-0003VP-O0 for incoming@patchwork.ozlabs.org; Mon, 29 Jan 2018 08:06:35 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51567) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eg8zb-0004Up-Jl for qemu-devel@nongnu.org; Mon, 29 Jan 2018 07:57:03 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eg8za-0002bd-Q8 for qemu-devel@nongnu.org; Mon, 29 Jan 2018 07:56:59 -0500 Received: from mx1.redhat.com ([209.132.183.28]:34772) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eg8za-0002ao-L1; Mon, 29 Jan 2018 07:56:58 -0500 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id C698B10F3CC; Mon, 29 Jan 2018 12:56:57 +0000 (UTC) Received: from t460s.redhat.com (ovpn-116-93.ams2.redhat.com [10.36.116.93]) by smtp.corp.redhat.com (Postfix) with ESMTP id C38737A039; Mon, 29 Jan 2018 12:56:51 +0000 (UTC) From: David Hildenbrand To: qemu-s390x@nongnu.org, qemu-devel@nongnu.org Date: Mon, 29 Jan 2018 13:56:12 +0100 Message-Id: <20180129125623.21729-8-david@redhat.com> In-Reply-To: <20180129125623.21729-1-david@redhat.com> References: <20180129125623.21729-1-david@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Mon, 29 Jan 2018 12:56:57 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 07/18] s390x/tcg: tolerate wrong wakeups due to floating interrupts X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , David Hildenbrand , Cornelia Huck , Alexander Graf , Christian Borntraeger , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" This is a preparation for floating interrupt support and only applies to MTTCG, single threaded TCG works just fine. If a floating interrupt wakes up a VCPU and the CPU thinks it can run (clearing cs->halted), at the point where the interrupt would be delivered, already another VCPU might have picked up the interrupt, resulting in a wakeup without an interrupt (executing wrong code). It is wrong to let the VCPU continue to execute (the WAIT PSW). Instead, we have to put the VCPU back to sleep. Signed-off-by: David Hildenbrand --- target/s390x/excp_helper.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 0cbc4051d1..23447af942 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -503,6 +503,11 @@ bool s390_cpu_exec_interrupt(CPUState *cs, int interrupt_request) s390_cpu_do_interrupt(cs); return true; } + if (env->psw.mask & PSW_MASK_WAIT) { + /* Woken up because of a floating interrupt but it has already + * been delivered. Go back to sleep. */ + cpu_interrupt(CPU(cpu), CPU_INTERRUPT_HALT); + } } return false; }