From patchwork Thu Jan 4 01:29:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 855331 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3zBrBj08Gnz9s81 for ; Thu, 4 Jan 2018 12:42:05 +1100 (AEDT) Received: from localhost ([::1]:44763 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eWuXj-0001GK-4F for incoming@patchwork.ozlabs.org; Wed, 03 Jan 2018 20:42:03 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58424) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eWuLV-0000te-FX for qemu-devel@nongnu.org; Wed, 03 Jan 2018 20:29:26 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eWuLS-00079n-8r for qemu-devel@nongnu.org; Wed, 03 Jan 2018 20:29:25 -0500 Received: from mout.kundenserver.de ([217.72.192.74]:64775) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1eWuLR-000780-U3 for qemu-devel@nongnu.org; Wed, 03 Jan 2018 20:29:22 -0500 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue105 [212.227.15.183]) with ESMTPSA (Nemesis) id 0M7av1-1es2001p0J-00xKv7; Thu, 04 Jan 2018 02:29:19 +0100 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Thu, 4 Jan 2018 02:29:04 +0100 Message-Id: <20180104012913.30763-9-laurent@vivier.eu> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180104012913.30763-1-laurent@vivier.eu> References: <20180104012913.30763-1-laurent@vivier.eu> X-Provags-ID: V03:K0:uUGM3+OwUFTozoCsHMq6d8fFZnLqc7TkBKPfVyRYxApstI915lX j2YLLCXwO/qqEg/gJFBsGdl24HB7u2dV71ZA6qBUG9y7d+q7ybDNWjZ2UivOA9ECc5Bfvqj DsT+YQ+MnaAcjojSjkkBtSuVAF2tgT9/lonl/nKOX5kZuQ58/kCx1orckiJCHGIV8deYJ2f Ue2ICcpFwkoXxA9j+Gtcw== X-UI-Out-Filterresults: notjunk:1; V01:K0:Y9QZajjT7BI=:1IBOlAYTWjIwWNUY24WGsa yUMhyqMMYyOagr9kYk9zjABPa89dFVav2PXGOi5ylJnx09qOLOG8RenCQT9lyxQavfKXVTElp 4PmkAEM8rT55cUBluwtN9V0Tr/RVlzu8rpfw3q6M4BAVbr7ZWvZtd78E4mr70vytit1Rt6CpH NYKTTjnGW2rWkNaX35kvNegOx+xRZUj0/tvmE876OgwNG18N98SVD9EVnhm1kCnja4oQo1vhM 25hQDdFCF5cDttLGCI5nmpcPboawkRpzdxJWd5AFZ25w1r1RAFfOhjBcFCKgb0YZPOd/7aAEG kve3ayEMyBpBstM8FWRQmyH9seNRFMIpbyri/ys4caoSTD9hcvgRajEyQhWN1+ut85hsykTZc sqvcsuBgsmSj59AVI9CEeJKYMskhGuwh3Oy3iHHjGkQHwsy9ioFCVcGSx/Xx+/dZNQWJ93d5b 0MiPDXHI5qQ5qWEftyjSeHATdBZMd2EkRjZ8f1pbQHMSdl6aaHTNggdjQnTMVvfp0rfoEmY1k 8Ns/Wk0eUGSwdtr6nDcPF0/F/gEfKxSgfkh0+wQTAPY4XPM/UFFUvIlTrmpUnAo+2yPtQoknY vvZ9lE3gFZL5T8AGUGpqt7dj1b54vS03yC+BuvuHAtdgNYYlWEhANahX1iAMN3DFoU6b42Q0P gGgU28xBgnFqExss6cMQy01lC45VuKh7NetLXxOCbVbts9Lu9t3fJbRYXzJu8q9Hkbf5XHrjr +i4Wsf81raKIJDi9dxNrc8r4B8/zi8GSu7FBfw== X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 217.72.192.74 Subject: [Qemu-devel] [PATCH v7 08/17] target/m68k: add move16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , Richard Henderson , Laurent Vivier Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" move16 moves the source line to the destination line. Lines are aligned to 16-byte boundaries and are 16 bytes long. Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson --- Notes: v6: split move16 in two functions target/m68k/cpu.c | 10 ++++++- target/m68k/cpu.h | 1 + target/m68k/translate.c | 72 +++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 82 insertions(+), 1 deletion(-) diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 57ffcb2114..1936efd170 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -137,7 +137,15 @@ static void m68020_cpu_initfn(Object *obj) m68k_set_feature(env, M68K_FEATURE_CHK2); } #define m68030_cpu_initfn m68020_cpu_initfn -#define m68040_cpu_initfn m68020_cpu_initfn + +static void m68040_cpu_initfn(Object *obj) +{ + M68kCPU *cpu = M68K_CPU(obj); + CPUM68KState *env = &cpu->env; + + m68020_cpu_initfn(obj); + m68k_set_feature(env, M68K_FEATURE_M68040); +} static void m68060_cpu_initfn(Object *obj) { diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index 68396bdd70..2ac4ab191e 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -306,6 +306,7 @@ enum m68k_features { M68K_FEATURE_BKPT, M68K_FEATURE_RTD, M68K_FEATURE_CHK2, + M68K_FEATURE_M68040, /* instructions specific to MC68040 */ }; static inline int m68k_feature(CPUM68KState *env, int feature) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 7f52065375..0ef933a545 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -4277,6 +4277,76 @@ DISAS_INSN(chk2) tcg_temp_free(reg); } +static void m68k_copy_line(TCGv dst, TCGv src, int index) +{ + TCGv addr; + TCGv_i64 t0, t1; + + addr = tcg_temp_new(); + + t0 = tcg_temp_new_i64(); + t1 = tcg_temp_new_i64(); + + tcg_gen_andi_i32(addr, src, ~15); + tcg_gen_qemu_ld64(t0, addr, index); + tcg_gen_addi_i32(addr, addr, 8); + tcg_gen_qemu_ld64(t1, addr, index); + + tcg_gen_andi_i32(addr, dst, ~15); + tcg_gen_qemu_st64(t0, addr, index); + tcg_gen_addi_i32(addr, addr, 8); + tcg_gen_qemu_st64(t1, addr, index); + + tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); + tcg_temp_free(addr); +} + +DISAS_INSN(move16_reg) +{ + int index = IS_USER(s); + TCGv tmp; + uint16_t ext; + + ext = read_im16(env, s); + if ((ext & (1 << 15)) == 0) { + gen_exception(s, s->insn_pc, EXCP_ILLEGAL); + } + + m68k_copy_line(AREG(ext, 12), AREG(insn, 0), index); + + /* Ax can be Ay, so save Ay before incrementing Ax */ + tmp = tcg_temp_new(); + tcg_gen_mov_i32(tmp, AREG(ext, 12)); + tcg_gen_addi_i32(AREG(insn, 0), AREG(insn, 0), 16); + tcg_gen_addi_i32(AREG(ext, 12), tmp, 16); + tcg_temp_free(tmp); +} + +DISAS_INSN(move16_mem) +{ + int index = IS_USER(s); + TCGv reg, addr; + + reg = AREG(insn, 0); + addr = tcg_const_i32(read_im32(env, s)); + + if ((insn >> 3) & 1) { + /* MOVE16 (xxx).L, (Ay) */ + m68k_copy_line(reg, addr, index); + } else { + /* MOVE16 (Ay), (xxx).L */ + m68k_copy_line(addr, reg, index); + } + + tcg_temp_free(addr); + + if (((insn >> 3) & 2) == 0) { + /* (Ay)+ */ + tcg_gen_addi_i32(reg, reg, 16); + } +} + static TCGv gen_get_sr(DisasContext *s) { TCGv ccr; @@ -5578,6 +5648,8 @@ void register_m68k_insns (CPUM68KState *env) INSN(fsave, f300, ffc0, FPU); INSN(intouch, f340, ffc0, CF_ISA_A); INSN(cpushl, f428, ff38, CF_ISA_A); + INSN(move16_mem, f600, ffe0, M68040); + INSN(move16_reg, f620, fff8, M68040); INSN(wddata, fb00, ff00, CF_ISA_A); INSN(wdebug, fbc0, ffc0, CF_ISA_A); #undef INSN