From patchwork Thu Jan 4 01:29:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 855332 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3zBrBk1xWtz9s9Y for ; Thu, 4 Jan 2018 12:42:06 +1100 (AEDT) Received: from localhost ([::1]:44767 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eWuXk-0001Gt-8t for incoming@patchwork.ozlabs.org; Wed, 03 Jan 2018 20:42:04 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58373) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eWuLU-0000r7-4S for qemu-devel@nongnu.org; Wed, 03 Jan 2018 20:29:25 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eWuLQ-00077E-FP for qemu-devel@nongnu.org; Wed, 03 Jan 2018 20:29:23 -0500 Received: from mout.kundenserver.de ([212.227.17.24]:55869) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1eWuLQ-00075V-4B for qemu-devel@nongnu.org; Wed, 03 Jan 2018 20:29:20 -0500 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue105 [212.227.15.183]) with ESMTPSA (Nemesis) id 0LiUtY-1f2gK10ir6-00ceZi; Thu, 04 Jan 2018 02:29:17 +0100 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Thu, 4 Jan 2018 02:29:00 +0100 Message-Id: <20180104012913.30763-5-laurent@vivier.eu> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180104012913.30763-1-laurent@vivier.eu> References: <20180104012913.30763-1-laurent@vivier.eu> X-Provags-ID: V03:K0:urCbtnpZHUDSFOA0P31AMFtATTtCdtWenmJ7uT1sku+r0fc/wmj Qjtw/0KxdpWxawUoRB2TXLg6vm2uYLFy0+TVqFi0Jc76qsXTjkbbMx2w8VB/o5gKBF+HauI O1ngdqr8nkqbCfGzA4IWtWCludPzZOWLOxRENHzobxRSZSKN5FPZYYo2ZYEV0AQuFXxe7Yq Ghw8HX4xXaHnTdTj/LnUg== X-UI-Out-Filterresults: notjunk:1; V01:K0:Hj1iYM1dAPs=:Qur2i5BcWt9OWTv1m3mmua 6VHGnqlwbxokpaTGrVjcZjecBxlDEG6MB4PT8a0DmmWcf6dauoYUvfHl0eB53cmV2ux8dlLpP yWifDYg9btUtSXw5bahIQZwa0UN80upNRKydsU2B9ScqPHS62Hm/byNg+RjKvsbgg+o4vtQJw 2AabFGziU1JzgitwAGxXh/4UIUFsgMJEp6Aw8fLFvWPeeT80WjfMBLZCPnO+JZ2cUmNbuBTvY zeYVDtEdYV7RFL6nJ+4zCOaxuIwf0RQWkEEyr1S0liJC64wWQfrWHXq5HmpBt4qT5RUH3QeHZ /qSkuQRa0IzrLkBtaNQiZjAYgUAvlTf+JDW10rK2VRklftUvsA4VXO2LrKGDltrXOyG/jkaJr qCZh/TRbh1jlkfc3dUUo3DUOjJkj1JKaZrqa2OKCcMbAnsrRmNwfzvd2TqlGz3gv9ViNFNjtA UfdtWa0LU8WmMwe39J6RKR16BWP9sfh3BIkg4zrEXiGCnbQZi+Er6hKC2jnFtfsW3dxcGZPPx +XKsEJIK/Lr8OSThdPuUKHNJOJKt3z8HicT+7eU/xKMCDrKe6iMj/cVxx3O1/ytoWFkMRgb0z hG+h2b/49i1llfPxovpmjVegQ3K/nQ5S5at9cOggCH9iXmqXQJvoX+/KTOiQwW2wpW0zQhiuV 8bZMMeschrTL5A/4WPcprqVS5FEG2kA3jXvHUXkFv7yaH67dEESA7GjwOQx3YulscsPgcR4DE 3FzpqxmggZ4qPhM+xThuMYloCrMs3OMrLMy4ug== X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 212.227.17.24 Subject: [Qemu-devel] [PATCH v7 04/17] target/m68k: use insn_pc to generate instruction fault address X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , Richard Henderson , Laurent Vivier Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson --- target/m68k/translate.c | 40 ++++++++++++++++++++-------------------- 1 file changed, 20 insertions(+), 20 deletions(-) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 1e9fb01252..a1e424e3db 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -1509,12 +1509,12 @@ DISAS_INSN(dbcc) DISAS_INSN(undef_mac) { - gen_exception(s, s->pc - 2, EXCP_LINEA); + gen_exception(s, s->insn_pc, EXCP_LINEA); } DISAS_INSN(undef_fpu) { - gen_exception(s, s->pc - 2, EXCP_LINEF); + gen_exception(s, s->insn_pc, EXCP_LINEF); } DISAS_INSN(undef) @@ -1523,8 +1523,8 @@ DISAS_INSN(undef) for the 680x0 series, as well as those that are implemented but actually illegal for CPU32 or pre-68020. */ qemu_log_mask(LOG_UNIMP, "Illegal instruction: %04x @ %08x", - insn, s->pc - 2); - gen_exception(s, s->pc - 2, EXCP_UNSUPPORTED); + insn, s->insn_pc); + gen_exception(s, s->insn_pc, EXCP_UNSUPPORTED); } DISAS_INSN(mulw) @@ -2583,7 +2583,7 @@ DISAS_INSN(swap) DISAS_INSN(bkpt) { - gen_exception(s, s->pc - 2, EXCP_DEBUG); + gen_exception(s, s->insn_pc, EXCP_DEBUG); } DISAS_INSN(pea) @@ -2636,7 +2636,7 @@ DISAS_INSN(pulse) DISAS_INSN(illegal) { - gen_exception(s, s->pc - 2, EXCP_ILLEGAL); + gen_exception(s, s->insn_pc, EXCP_ILLEGAL); } /* ??? This should be atomic. */ @@ -2666,7 +2666,7 @@ DISAS_INSN(mull) if (ext & 0x400) { if (!m68k_feature(s->env, M68K_FEATURE_QUAD_MULDIV)) { - gen_exception(s, s->pc - 4, EXCP_UNSUPPORTED); + gen_exception(s, s->insn_pc, EXCP_UNSUPPORTED); return; } @@ -4240,7 +4240,7 @@ DISAS_INSN(move_from_sr) TCGv sr; if (IS_USER(s) && !m68k_feature(env, M68K_FEATURE_M68000)) { - gen_exception(s, s->pc - 2, EXCP_PRIVILEGE); + gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); return; } sr = gen_get_sr(s); @@ -4250,7 +4250,7 @@ DISAS_INSN(move_from_sr) DISAS_INSN(move_to_sr) { if (IS_USER(s)) { - gen_exception(s, s->pc - 2, EXCP_PRIVILEGE); + gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); return; } gen_set_sr(env, s, insn, 0); @@ -4260,7 +4260,7 @@ DISAS_INSN(move_to_sr) DISAS_INSN(move_from_usp) { if (IS_USER(s)) { - gen_exception(s, s->pc - 2, EXCP_PRIVILEGE); + gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); return; } tcg_gen_ld_i32(AREG(insn, 0), cpu_env, @@ -4270,7 +4270,7 @@ DISAS_INSN(move_from_usp) DISAS_INSN(move_to_usp) { if (IS_USER(s)) { - gen_exception(s, s->pc - 2, EXCP_PRIVILEGE); + gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); return; } tcg_gen_st_i32(AREG(insn, 0), cpu_env, @@ -4287,7 +4287,7 @@ DISAS_INSN(stop) uint16_t ext; if (IS_USER(s)) { - gen_exception(s, s->pc - 2, EXCP_PRIVILEGE); + gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); return; } @@ -4301,10 +4301,10 @@ DISAS_INSN(stop) DISAS_INSN(rte) { if (IS_USER(s)) { - gen_exception(s, s->pc - 2, EXCP_PRIVILEGE); + gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); return; } - gen_exception(s, s->pc - 2, EXCP_RTE); + gen_exception(s, s->insn_pc, EXCP_RTE); } DISAS_INSN(movec) @@ -4313,7 +4313,7 @@ DISAS_INSN(movec) TCGv reg; if (IS_USER(s)) { - gen_exception(s, s->pc - 2, EXCP_PRIVILEGE); + gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); return; } @@ -4331,7 +4331,7 @@ DISAS_INSN(movec) DISAS_INSN(intouch) { if (IS_USER(s)) { - gen_exception(s, s->pc - 2, EXCP_PRIVILEGE); + gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); return; } /* ICache fetch. Implement as no-op. */ @@ -4340,7 +4340,7 @@ DISAS_INSN(intouch) DISAS_INSN(cpushl) { if (IS_USER(s)) { - gen_exception(s, s->pc - 2, EXCP_PRIVILEGE); + gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); return; } /* Cache push/invalidate. Implement as no-op. */ @@ -4348,7 +4348,7 @@ DISAS_INSN(cpushl) DISAS_INSN(wddata) { - gen_exception(s, s->pc - 2, EXCP_PRIVILEGE); + gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); } DISAS_INSN(wdebug) @@ -4356,7 +4356,7 @@ DISAS_INSN(wdebug) M68kCPU *cpu = m68k_env_get_cpu(env); if (IS_USER(s)) { - gen_exception(s, s->pc - 2, EXCP_PRIVILEGE); + gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); return; } /* TODO: Implement wdebug. */ @@ -4365,7 +4365,7 @@ DISAS_INSN(wdebug) DISAS_INSN(trap) { - gen_exception(s, s->pc - 2, EXCP_TRAP0 + (insn & 0xf)); + gen_exception(s, s->insn_pc, EXCP_TRAP0 + (insn & 0xf)); } static void gen_load_fcr(DisasContext *s, TCGv res, int reg)