From patchwork Thu Nov 23 16:35:35 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 840835 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3yjQ4H0PhBz9ryk for ; Fri, 24 Nov 2017 03:38:23 +1100 (AEDT) Received: from localhost ([::1]:45133 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eHuW5-0000rY-50 for incoming@patchwork.ozlabs.org; Thu, 23 Nov 2017 11:38:21 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46761) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eHuTx-0007ow-IY for qemu-devel@nongnu.org; Thu, 23 Nov 2017 11:36:10 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eHuTu-0003NE-3b for qemu-devel@nongnu.org; Thu, 23 Nov 2017 11:36:09 -0500 Received: from mout.kundenserver.de ([212.227.126.135]:61899) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1eHuTt-0003Lj-PJ for qemu-devel@nongnu.org; Thu, 23 Nov 2017 11:36:06 -0500 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue007 [212.227.15.167]) with ESMTPSA (Nemesis) id 0MYYMv-1ee41Z1eFt-00V7FU; Thu, 23 Nov 2017 17:35:44 +0100 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Thu, 23 Nov 2017 17:35:35 +0100 Message-Id: <20171123163538.31411-3-laurent@vivier.eu> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20171123163538.31411-1-laurent@vivier.eu> References: <20171123163538.31411-1-laurent@vivier.eu> X-Provags-ID: V03:K0:nVsEJGY/0p6yIil6sxxeAdAWJd87ejheRt9wYZIQvF/fXgWywT4 KMgiYphGtE5i9JY/UqjFusJCZHb4ohV22slDwJNt4YZtlhjFu8uuL0RaqcByHIa5XeqIoog CnOS1ikQP/1CNeB5dDEeVfTNjW7OjVQgpGVkaykCEzDm75NX18Z3PN+TVMfxOkaBj7fCcS2 ies3woDdAWKsq+MFn0H3Q== X-UI-Out-Filterresults: notjunk:1; V01:K0:gVl3GwLxTlg=:S1EhjUK+wsVta1LwvcAYdJ m6NisvPJoWS4Bersem2a5n90NPqrBk9hlwgZDDdR6/jFyg3L6vf5zu+z0ZcrKkvCK7ETkDqPm 8nCod9bn/mekXwOAwp/K+KvYn3N21HjwvdJ7zvyrYhONBWZpj5jR9g6Cip9kV0ugud0P/N0ys u+skvou6y0EASV6lsvjaKyIOkHIi2LBLeCX+X+DBtZX/wRKIUoEfazYp0geO96HLUJZf2sk3H T+he6jXr+qnKDzpJq6D26XeTmMG/QOT7OaTPjpZmGBuAjxow8qUMRTeW/40TySeMfv9XRozEp 8K8KkvWUWfQ8isuXijJHT6M00jv26xY4pIT5cLOpGLo3R0EXa6P9enOu7yiD0HB36QOpr8UCo FwD3ve/MYN0Y5EdWcxK3V/XDroru0a/TbJXZhXHHensPmCkPD23d3aQYbAPg5WUi9P1FlDlg1 zgICDrMoPcA/J12ahNGJGeU66gaHZhNDoYlfDWS3xF4JKHV4wQ9/bPw04aVOqKBGdPftDfC7c QGQwnnKT3+t8OxSwI6nGHqcI8rKWP40aM2v+7deBqfLT4nrmZsscyva8njg25hQ7GIPBS0tDl MmKWOI6FCfJgim3b+Vq2ydCpmHyaF7DTGyj6IZmZ+XnvYO+2WNukrfK0qn7i/L4q7XvIQjK0I XS1/mU/iKb05jUbQHkAqrQl4N0c4ZUT71SshUi5WXckrh05PsofRpfBODQJ/8B/HQwlsPAvYT nvDrOHuQkiTSIL7iXE5I027NJGRVLzufLM92Ew== X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 212.227.126.135 Subject: [Qemu-devel] [PATCH v2 2/5] target/m68k: add fmod/frem X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , Laurent Vivier , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Use floatx80_mod() and floatx80_rem() The quotient byte of the FPSR is updated with the result of the operation. Signed-off-by: Laurent Vivier --- target/m68k/cpu.h | 1 + target/m68k/fpu_helper.c | 33 +++++++++++++++++++++++++++++++++ target/m68k/helper.h | 2 ++ target/m68k/translate.c | 6 ++++++ 4 files changed, 42 insertions(+) diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index afae5f68ac..4ba613dfbe 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -234,6 +234,7 @@ typedef enum { /* Quotient */ #define FPSR_QT_MASK 0x00ff0000 +#define FPSR_QT_SHIFT 16 /* Floating-Point Control Register */ /* Rounding mode */ diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c index 665e7609af..dd8b6950d6 100644 --- a/target/m68k/fpu_helper.c +++ b/target/m68k/fpu_helper.c @@ -508,3 +508,36 @@ uint32_t HELPER(fmovemd_ld_postinc)(CPUM68KState *env, uint32_t addr, { return fmovem_postinc(env, addr, mask, cpu_ld_float64_ra); } + +static void make_quotient(CPUM68KState *env, floatx80 val) +{ + int32_t quotient; + int sign; + + if (floatx80_is_any_nan(val)) { + return; + } + + quotient = floatx80_to_int32(val, &env->fp_status); + sign = quotient < 0; + if (sign) { + quotient = -quotient; + } + + quotient = (sign << 7) | (quotient & 0x7f); + env->fpsr = (env->fpsr & ~FPSR_QT_MASK) | (quotient << FPSR_QT_SHIFT); +} + +void HELPER(fmod)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) +{ + res->d = floatx80_mod(val1->d, val0->d, &env->fp_status); + + make_quotient(env, res->d); +} + +void HELPER(frem)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) +{ + res->d = floatx80_rem(val1->d, val0->d, &env->fp_status); + + make_quotient(env, res->d); +} diff --git a/target/m68k/helper.h b/target/m68k/helper.h index eebe52dae5..ff9d99ae27 100644 --- a/target/m68k/helper.h +++ b/target/m68k/helper.h @@ -61,6 +61,8 @@ DEF_HELPER_3(fmovemx_ld_postinc, i32, env, i32, i32) DEF_HELPER_3(fmovemd_st_predec, i32, env, i32, i32) DEF_HELPER_3(fmovemd_st_postinc, i32, env, i32, i32) DEF_HELPER_3(fmovemd_ld_postinc, i32, env, i32, i32) +DEF_HELPER_4(fmod, void, env, fp, fp, fp) +DEF_HELPER_4(frem, void, env, fp, fp, fp) DEF_HELPER_3(mac_move, void, env, i32, i32) DEF_HELPER_3(macmulf, i64, env, i32, i32) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index b60909222c..66f873899f 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -4686,6 +4686,9 @@ DISAS_INSN(fpu) case 0x64: /* fddiv */ gen_helper_fddiv(cpu_env, cpu_dest, cpu_src, cpu_dest); break; + case 0x21: /* fmod */ + gen_helper_fmod(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; case 0x22: /* fadd */ gen_helper_fadd(cpu_env, cpu_dest, cpu_src, cpu_dest); break; @@ -4707,6 +4710,9 @@ DISAS_INSN(fpu) case 0x24: /* fsgldiv */ gen_helper_fsgldiv(cpu_env, cpu_dest, cpu_src, cpu_dest); break; + case 0x25: /* frem */ + gen_helper_frem(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; case 0x27: /* fsglmul */ gen_helper_fsglmul(cpu_env, cpu_dest, cpu_src, cpu_dest); break;