From patchwork Thu Nov 9 14:41:53 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kirill Batuzov X-Patchwork-Id: 836387 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3yXmBj0jb2z9t4c for ; Fri, 10 Nov 2017 01:43:57 +1100 (AEDT) Received: from localhost ([::1]:37242 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eCo3e-0006Gg-VI for incoming@patchwork.ozlabs.org; Thu, 09 Nov 2017 09:43:54 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57487) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eCo2L-0005mJ-OM for qemu-devel@nongnu.org; Thu, 09 Nov 2017 09:42:36 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eCo2H-0002rD-66 for qemu-devel@nongnu.org; Thu, 09 Nov 2017 09:42:33 -0500 Received: from bran.ispras.ru ([83.149.199.196]:54420 helo=smtp.ispras.ru) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eCo2G-0002r0-UT for qemu-devel@nongnu.org; Thu, 09 Nov 2017 09:42:29 -0500 Received: from bulbul.intra.ispras.ru (bulbul.intra.ispras.ru [10.10.3.51]) by smtp.ispras.ru (Postfix) with ESMTP id 4611C203C2; Thu, 9 Nov 2017 17:42:28 +0300 (MSK) From: Kirill Batuzov To: qemu-devel@nongnu.org Date: Thu, 9 Nov 2017 17:41:53 +0300 Message-Id: <20171109144155.17076-2-batuzovk@ispras.ru> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171109144155.17076-1-batuzovk@ispras.ru> References: <20171109144155.17076-1-batuzovk@ispras.ru> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 83.149.199.196 Subject: [Qemu-devel] [PATCH RFC 1/3] tcg: support MOV_VEC and MOVI_VEC opcodes in register allocator X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , =?utf-8?q?Alex_Benn?= =?utf-8?b?w6ll?= , Kirill Batuzov Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Kirill Batuzov --- tcg/tcg.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tcg/tcg.c b/tcg/tcg.c index a7854a59a1..6db7dd526a 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -3327,10 +3327,12 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb) switch (opc) { case INDEX_op_mov_i32: case INDEX_op_mov_i64: + case INDEX_op_mov_vec: tcg_reg_alloc_mov(s, op); break; case INDEX_op_movi_i32: case INDEX_op_movi_i64: + case INDEX_op_movi_vec: tcg_reg_alloc_movi(s, op); break; case INDEX_op_insn_start: