From patchwork Sun Oct 29 10:13:35 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Francisco Iglesias X-Patchwork-Id: 831704 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="SKUMLJK5"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3yPtpY4wSzz9t0F for ; Sun, 29 Oct 2017 21:17:41 +1100 (AEDT) Received: from localhost ([::1]:35470 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e8kex-0000i4-Ml for incoming@patchwork.ozlabs.org; Sun, 29 Oct 2017 06:17:39 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46044) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e8kbQ-0006ZD-Pf for qemu-devel@nongnu.org; Sun, 29 Oct 2017 06:14:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1e8kbM-0007rZ-QB for qemu-devel@nongnu.org; Sun, 29 Oct 2017 06:14:00 -0400 Received: from mail-lf0-x243.google.com ([2a00:1450:4010:c07::243]:50899) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1e8kbM-0007r0-5L for qemu-devel@nongnu.org; Sun, 29 Oct 2017 06:13:56 -0400 Received: by mail-lf0-x243.google.com with SMTP id a132so11641824lfa.7 for ; Sun, 29 Oct 2017 03:13:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=d2LdmCsfS3KEKB+Rj4ebP3cd2+seSDFhzNv0JKmY594=; b=SKUMLJK58RieQoKpBBD5ySLlxo2F/iCcOY+9aXBvBs3yMmDepqD2ETHk3We4PjCxI1 dAQZCyDtDne75ZN/PmWh/cR4vsF5J7/mIZSw2Po2HnYP5+otgmjsPo5VQXzUGooK+ng8 f9WEOTGkVVEmyyIu7aSXeM6CMvxUt64pNOcgoYYlhz732xlhNbdi9zBvcd6ziDcrFqa1 jFj2I50dWHzaJhT45tP7k3yWr961SySw0N4k/jAazlzIuEtnx/uNXkpbdtFFYBMe8Id8 HNxTU92YP1IQlD/JPeMsydsyCcqHo+jdVQeZ88mhZFms55e5HPLWuBBp82qIBJe1C06G zAjA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=d2LdmCsfS3KEKB+Rj4ebP3cd2+seSDFhzNv0JKmY594=; b=Aec5dPSRQfZylpllrpqing34RybZ1R6veEgEGuTyVSfQcubaMKH1HXby2CmoCpvREA 8Hxvg6j6d0rCr1xwuATK9V+3PhKxs/nYG71T/MHKSNDOVWfurRpcDTLzw4jjB7K/D2B4 opuGYmlboQHv3ky4uqXDjABdE4LRLS4xMFe4MBHQARuw3HpqTfrvPgG9vXTBIoZl7LXX pOEkrGcEOqpxSE7e3fJ1cuWTzYx6C257lg8U8/y+8AORHdOEfnDSf7uHfwtXdxsQDlvB avjvy1PgU2L3rz32izUkI/YuCHWyzbjRC/YuOEJPbc589Pc5eWUOrqjBmdWA6w5VGwcP T9kA== X-Gm-Message-State: AMCzsaVj5n8BKb8+9YHJDAdJpIS78M1Ka2r9MMWiRWq7Rhno8DyDUj2z UD43ttpZokpIhobVTDEFBv6XmA== X-Google-Smtp-Source: ABhQp+TYJg7kUAAGP83mAzMiAZ//cEYP42p5cYqvwfGO7X2mGWAFX3eW0VUc6kg3JT+Pr1Nogh4qWg== X-Received: by 10.25.23.214 with SMTP id 83mr1726504lfx.213.1509272034694; Sun, 29 Oct 2017 03:13:54 -0700 (PDT) Received: from localhost.localdomain (c83-254-152-225.bredband.comhem.se. [83.254.152.225]) by smtp.gmail.com with ESMTPSA id v62sm2819800lje.39.2017.10.29.03.13.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 29 Oct 2017 03:13:53 -0700 (PDT) From: Francisco Iglesias To: qemu-devel@nongnu.org Date: Sun, 29 Oct 2017 11:13:35 +0100 Message-Id: <20171029101343.15544-6-frasse.iglesias@gmail.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20171029101343.15544-1-frasse.iglesias@gmail.com> References: <20171029101343.15544-1-frasse.iglesias@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4010:c07::243 Subject: [Qemu-devel] [PATCH v5 05/13] xilinx_spips: Move FlashCMD, XilinxQSPIPS and XilinxSPIPSClass X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgari@xilinx.com, alistai@xilinx.com, francisco.iglesias@feimtech.se, mar.krzeminski@gmail.com Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Move the FlashCMD enum, XilinxQSPIPS and XilinxSPIPSClass structures to the header for consistency. Also move out a define and remove two dubbel included headers (while touching the code). Finally, add 4 byte address commands to the FlashCMD enum. Signed-off-by: Francisco Iglesias --- hw/ssi/xilinx_spips.c | 35 ----------------------------------- include/hw/ssi/xilinx_spips.h | 34 ++++++++++++++++++++++++++++++++++ 2 files changed, 34 insertions(+), 35 deletions(-) diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c index ef56d35..559fa79 100644 --- a/hw/ssi/xilinx_spips.c +++ b/hw/ssi/xilinx_spips.c @@ -27,8 +27,6 @@ #include "sysemu/sysemu.h" #include "hw/ptimer.h" #include "qemu/log.h" -#include "qemu/fifo8.h" -#include "hw/ssi/ssi.h" #include "qemu/bitops.h" #include "hw/ssi/xilinx_spips.h" #include "qapi/error.h" @@ -116,44 +114,11 @@ /* 16MB per linear region */ #define LQSPI_ADDRESS_BITS 24 -/* Bite off 4k chunks at a time */ -#define LQSPI_CACHE_SIZE 1024 #define SNOOP_CHECKING 0xFF #define SNOOP_NONE 0xFE #define SNOOP_STRIPING 0 -typedef enum { - READ = 0x3, - FAST_READ = 0xb, - DOR = 0x3b, - QOR = 0x6b, - DIOR = 0xbb, - QIOR = 0xeb, - - PP = 0x2, - DPP = 0xa2, - QPP = 0x32, -} FlashCMD; - -typedef struct { - XilinxSPIPS parent_obj; - - uint8_t lqspi_buf[LQSPI_CACHE_SIZE]; - hwaddr lqspi_cached_addr; - Error *migration_blocker; - bool mmio_execution_enabled; -} XilinxQSPIPS; - -typedef struct XilinxSPIPSClass { - SysBusDeviceClass parent_class; - - const MemoryRegionOps *reg_ops; - - uint32_t rx_fifo_size; - uint32_t tx_fifo_size; -} XilinxSPIPSClass; - static inline int num_effective_busses(XilinxSPIPS *s) { return (s->regs[R_LQSPI_CFG] & LQSPI_CFG_SEP_BUS && diff --git a/include/hw/ssi/xilinx_spips.h b/include/hw/ssi/xilinx_spips.h index 06aa096..7f9e2fc 100644 --- a/include/hw/ssi/xilinx_spips.h +++ b/include/hw/ssi/xilinx_spips.h @@ -32,6 +32,22 @@ typedef struct XilinxSPIPS XilinxSPIPS; #define XLNX_SPIPS_R_MAX (0x100 / 4) +/* Bite off 4k chunks at a time */ +#define LQSPI_CACHE_SIZE 1024 + +typedef enum { + READ = 0x3, READ_4 = 0x13, + FAST_READ = 0xb, FAST_READ_4 = 0x0c, + DOR = 0x3b, DOR_4 = 0x3c, + QOR = 0x6b, QOR_4 = 0x6c, + DIOR = 0xbb, DIOR_4 = 0xbc, + QIOR = 0xeb, QIOR_4 = 0xec, + + PP = 0x2, PP_4 = 0x12, + DPP = 0xa2, + QPP = 0x32, QPP_4 = 0x34, +} FlashCMD; + struct XilinxSPIPS { SysBusDevice parent_obj; @@ -56,6 +72,24 @@ struct XilinxSPIPS { uint32_t regs[XLNX_SPIPS_R_MAX]; }; +typedef struct { + XilinxSPIPS parent_obj; + + uint8_t lqspi_buf[LQSPI_CACHE_SIZE]; + hwaddr lqspi_cached_addr; + Error *migration_blocker; + bool mmio_execution_enabled; +} XilinxQSPIPS; + +typedef struct XilinxSPIPSClass { + SysBusDeviceClass parent_class; + + const MemoryRegionOps *reg_ops; + + uint32_t rx_fifo_size; + uint32_t tx_fifo_size; +} XilinxSPIPSClass; + #define TYPE_XILINX_SPIPS "xlnx.ps7-spi" #define TYPE_XILINX_QSPIPS "xlnx.ps7-qspi"