| Message ID | 20171005164959.26024-3-clg@kaod.org |
|---|---|
| State | New |
| Headers | show |
| Series | disable the decrementer interrupt when a CPU is unplugged | expand |
On Thu, Oct 05, 2017 at 06:49:59PM +0200, Cédric Le Goater wrote: > When a CPU is stopped with the 'stop-self' RTAS call, its state > 'halted' is switched to 1 and, in this case, the MSR is not taken into > account anymore in the cpu_has_work() routine. Only the pending > hardware interrupts are checked with their LPCR:PECE* enablement bit. > > The CPU is now also protected from the decrementer interrupt by the > LPCR:PECE* bits which are disabled in the 'stop-self' RTAS > call. Reseting the MSR is pointless. > > Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> > --- > hw/ppc/spapr_rtas.c | 10 ---------- > 1 file changed, 10 deletions(-) > > diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c > index 2389220c9738..7f5ddce89ef2 100644 > --- a/hw/ppc/spapr_rtas.c > +++ b/hw/ppc/spapr_rtas.c > @@ -209,16 +209,6 @@ static void rtas_stop_self(PowerPCCPU *cpu, sPAPRMachineState *spapr, > > cs->halted = 1; > qemu_cpu_kick(cs); > - /* > - * While stopping a CPU, the guest calls H_CPPR which > - * effectively disables interrupts on XICS level. > - * However decrementer interrupts in TCG can still > - * wake the CPU up so here we disable interrupts in MSR > - * as well. > - * As rtas_start_cpu() resets the whole MSR anyway, there is > - * no need to bother with specific bits, we just clear it. > - */ > - env->msr = 0; > > if (env->mmu_model == POWERPC_MMU_3_00) { > env->spr[SPR_LPCR] &= ~LPCR_DEE;
diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c index 2389220c9738..7f5ddce89ef2 100644 --- a/hw/ppc/spapr_rtas.c +++ b/hw/ppc/spapr_rtas.c @@ -209,16 +209,6 @@ static void rtas_stop_self(PowerPCCPU *cpu, sPAPRMachineState *spapr, cs->halted = 1; qemu_cpu_kick(cs); - /* - * While stopping a CPU, the guest calls H_CPPR which - * effectively disables interrupts on XICS level. - * However decrementer interrupts in TCG can still - * wake the CPU up so here we disable interrupts in MSR - * as well. - * As rtas_start_cpu() resets the whole MSR anyway, there is - * no need to bother with specific bits, we just clear it. - */ - env->msr = 0; if (env->mmu_model == POWERPC_MMU_3_00) { env->spr[SPR_LPCR] &= ~LPCR_DEE;
When a CPU is stopped with the 'stop-self' RTAS call, its state 'halted' is switched to 1 and, in this case, the MSR is not taken into account anymore in the cpu_has_work() routine. Only the pending hardware interrupts are checked with their LPCR:PECE* enablement bit. The CPU is now also protected from the decrementer interrupt by the LPCR:PECE* bits which are disabled in the 'stop-self' RTAS call. Reseting the MSR is pointless. Signed-off-by: Cédric Le Goater <clg@kaod.org> --- hw/ppc/spapr_rtas.c | 10 ---------- 1 file changed, 10 deletions(-)