@@ -371,6 +371,10 @@ static void spapr_xive_realize(DeviceState *dev, Error **errp)
ics_set_irq_type(xive->ics, i, false);
}
+ /* All sources are emulated under the XIVE object and share the
+ * same characteristic */
+ xive->flags = XIVE_SRC_TRIGGER;
+
/* Allocate SBEs (State Bit Entry). 2 bits, so 4 entries per byte */
xive->sbe_size = DIV_ROUND_UP(xive->nr_irqs, 4);
xive->sbe = g_malloc0(xive->sbe_size);
@@ -40,6 +40,13 @@ struct sPAPRXive {
ICSState *ics; /* XICS source inherited from the SPAPR machine */
qemu_irq *qirqs;
+ /* Interrupt source flags */
+#define XIVE_SRC_H_INT_ESB (1ull << (63 - 60))
+#define XIVE_SRC_LSI (1ull << (63 - 61))
+#define XIVE_SRC_TRIGGER (1ull << (63 - 62))
+#define XIVE_SRC_STORE_EOI (1ull << (63 - 63))
+ uint32_t flags;
+
/* XIVE internal tables */
uint8_t *sbe;
uint32_t sbe_size;
The XIVE interrupt sources can have different characteristics depending on their nature and the HW level in use. The PAPR specs provide a set of flags to describe them : : - XIVE_SRC_H_INT_ESB the Event State Buffers are controlled with a specific hcall H_INT_ESB and not with MMIO - XIVE_SRC_LSI LSI or MSI source (ICSIRQState level) - XIVE_SRC_TRIGGER the full function page supports trigger - XIVE_SRC_STORE_EOI EOI can be done with a store. Our QEMU emulation of XIVE for the sPAPR machine gathers all sources under a same model and provides a common source with the XIVE_SRC_TRIGGER type. So, the above list is mostly informative apart from the XIVE_SRC_LSI flag which will be deduced from the XICS_FLAGS_IRQ_LSI flag of the ICSIRQState array when needed. The OS retrieves this information on the source with the H_INT_GET_SOURCE_INFO hcall. Signed-off-by: Cédric Le Goater <clg@kaod.org> --- hw/intc/spapr_xive.c | 4 ++++ include/hw/ppc/spapr_xive.h | 7 +++++++ 2 files changed, 11 insertions(+)