From patchwork Wed Jun 28 20:42:39 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 781927 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3wyZX40wq9z9s4q for ; Thu, 29 Jun 2017 06:44:04 +1000 (AEST) Received: from localhost ([::1]:35576 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dQJof-0005Xa-NU for incoming@patchwork.ozlabs.org; Wed, 28 Jun 2017 16:44:01 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39747) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dQJo0-0005Vn-M9 for qemu-devel@nongnu.org; Wed, 28 Jun 2017 16:43:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dQJnz-0003Ve-Ji for qemu-devel@nongnu.org; Wed, 28 Jun 2017 16:43:20 -0400 Received: from mout.kundenserver.de ([217.72.192.74]:52684) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dQJnz-0003VA-7Y for qemu-devel@nongnu.org; Wed, 28 Jun 2017 16:43:19 -0400 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue104 [212.227.15.183]) with ESMTPSA (Nemesis) id 0MFsVa-1dUBQd09Go-00EtHb; Wed, 28 Jun 2017 22:42:49 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Wed, 28 Jun 2017 22:42:39 +0200 Message-Id: <20170628204241.32106-6-laurent@vivier.eu> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170628204241.32106-1-laurent@vivier.eu> References: <20170628204241.32106-1-laurent@vivier.eu> X-Provags-ID: V03:K0:JMdwZKswZjJoIm5gO22KTXaIOAsP1LvWMOIY4xwLUH0zl50smP6 4Do78yyQWbreENnTrPWHst6Vym2+ker3rXj1HSThEPV0x5zbTbXv0rjCmVlsEAccoj32e9Y /iGuumZAMaLiUOsAHeZ6HAM5RMibhs1CW2v2CMKn4OoG5mSHt6WqvfBNWFuD2hTjCWMSsH5 Gm+kXX6RTRddmIWxqBNFA== X-UI-Out-Filterresults: notjunk:1; V01:K0:TSbN9EFDLjo=:eTFdqGXkKUaGG22VTO7At1 FJtt18EoXECWCfv5PMEDvd2EHOpYkFRbDPFTsu1db8E7/wNE0kZuMaoqNoL1xkpS6IRiRwVfK 3nGVhzzDwQkhQp81jmYM/z/6DMfxCJDMDuxKwXdiJc/qYGIN2zLvBsWNMTKG37Vh85ZA+6vTX 06NB1X6M79k9ZnXF3mNqu6k8TimQff6VOJzJ5MRVy6yJje0/zLsdU+TgcX8MB8rypxNX1bfYG JZryKgwuj/zNtiwhA2XkM4dSMki6jSAGcQwNOdfQB3T0RacbT1iT2zQoUQhRALdGbEuCNM9E5 KZHeEjH6D38Jqky7YZiJ5sbgXWQkaLpFKPp9kmhmV22AG7XSsM0nNPu2EvqxhDFYcg6DyT9nQ HL1mKy5ESf/hqOVWVD2Bzk9fRVSKAnwjuuR+Wo37rnaqpDuMxZKq0vZhKgqLuMrKX2965teRt 84TDY1Yj7rW+RqEG9sYMiZXeCNNHEJ8VbbH/Ny8GlpAgOUL8Gq7g8CrCq3W/MnP3s+m9VCOJC HB1AZIQLKX7MGzw7v+XksmLg7jnNZbJ1mQwqqWHToZF39hyO4Ha9j2IVoJCj+BSKwZEDVz5ir 5h6wnUWZW+lCbRQtWc/cXdw4Ftfy5P2VZwrMCCG1r2XguSpcrvTVl2IctiOPkUwdAtuC1X476 iy/GUOLgFL8iVWzfYWLhV+JwYlQgsy97vT3S/wrkZXl4xkmUXAb6OKvc8G3c8n+0yClQ= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 217.72.192.74 Subject: [Qemu-devel] [PATCH v4 5/7] target/m68k: add fsglmul and fsgldiv X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" fsglmul and fsgldiv truncate data to single precision before computing results. Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson --- target/m68k/fpu_helper.c | 28 ++++++++++++++++++++++++++++ target/m68k/helper.h | 2 ++ target/m68k/translate.c | 6 ++++++ 3 files changed, 36 insertions(+) diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c index 3b53554..600ae8a 100644 --- a/target/m68k/fpu_helper.c +++ b/target/m68k/fpu_helper.c @@ -253,6 +253,20 @@ void HELPER(fdmul)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) PREC_END(); } +void HELPER(fsglmul)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) +{ + int rounding_mode = get_float_rounding_mode(&env->fp_status); + floatx80 a, b; + + PREC_BEGIN(32); + set_float_rounding_mode(float_round_to_zero, &env->fp_status); + a = floatx80_round(val0->d, &env->fp_status); + b = floatx80_round(val1->d, &env->fp_status); + set_float_rounding_mode(rounding_mode, &env->fp_status); + res->d = floatx80_mul(a, b, &env->fp_status); + PREC_END(); +} + void HELPER(fdiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) { res->d = floatx80_div(val1->d, val0->d, &env->fp_status); @@ -272,6 +286,20 @@ void HELPER(fddiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) PREC_END(); } +void HELPER(fsgldiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) +{ + int rounding_mode = get_float_rounding_mode(&env->fp_status); + floatx80 a, b; + + PREC_BEGIN(32); + set_float_rounding_mode(float_round_to_zero, &env->fp_status); + a = floatx80_round(val1->d, &env->fp_status); + b = floatx80_round(val0->d, &env->fp_status); + set_float_rounding_mode(rounding_mode, &env->fp_status); + res->d = floatx80_div(a, b, &env->fp_status); + PREC_END(); +} + static int float_comp_to_cc(int float_compare) { switch (float_compare) { diff --git a/target/m68k/helper.h b/target/m68k/helper.h index 0c7f06f..f05191b 100644 --- a/target/m68k/helper.h +++ b/target/m68k/helper.h @@ -39,9 +39,11 @@ DEF_HELPER_4(fdsub, void, env, fp, fp, fp) DEF_HELPER_4(fmul, void, env, fp, fp, fp) DEF_HELPER_4(fsmul, void, env, fp, fp, fp) DEF_HELPER_4(fdmul, void, env, fp, fp, fp) +DEF_HELPER_4(fsglmul, void, env, fp, fp, fp) DEF_HELPER_4(fdiv, void, env, fp, fp, fp) DEF_HELPER_4(fsdiv, void, env, fp, fp, fp) DEF_HELPER_4(fddiv, void, env, fp, fp, fp) +DEF_HELPER_4(fsgldiv, void, env, fp, fp, fp) DEF_HELPER_FLAGS_3(fcmp, TCG_CALL_NO_RWG, void, env, fp, fp) DEF_HELPER_FLAGS_2(set_fpcr, TCG_CALL_NO_RWG, void, env, i32) DEF_HELPER_FLAGS_2(ftst, TCG_CALL_NO_RWG, void, env, fp) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 618abf6..72c45de 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -4646,6 +4646,12 @@ DISAS_INSN(fpu) case 0x67: /* fdmul */ gen_helper_fdmul(cpu_env, cpu_dest, cpu_src, cpu_dest); break; + case 0x24: /* fsgldiv */ + gen_helper_fsgldiv(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; + case 0x27: /* fsglmul */ + gen_helper_fsglmul(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; case 0x28: /* fsub */ gen_helper_fsub(cpu_env, cpu_dest, cpu_src, cpu_dest); break;