From patchwork Tue Jun 27 19:12:19 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 781351 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3wxwd93qspz9s2G for ; Wed, 28 Jun 2017 05:16:13 +1000 (AEST) Received: from localhost ([::1]:57771 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dPvy7-0000ED-7D for incoming@patchwork.ozlabs.org; Tue, 27 Jun 2017 15:16:11 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39542) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dPvv8-0006Pp-P5 for qemu-devel@nongnu.org; Tue, 27 Jun 2017 15:13:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dPvv5-0001SZ-Gi for qemu-devel@nongnu.org; Tue, 27 Jun 2017 15:13:06 -0400 Received: from mout.kundenserver.de ([212.227.17.24]:58156) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dPvv5-0001Qh-4d for qemu-devel@nongnu.org; Tue, 27 Jun 2017 15:13:03 -0400 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue104 [212.227.15.183]) with ESMTPSA (Nemesis) id 0Ma2zH-1dBPjF1Qat-00LnAd; Tue, 27 Jun 2017 21:12:30 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Tue, 27 Jun 2017 21:12:19 +0200 Message-Id: <20170627191221.31650-6-laurent@vivier.eu> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170627191221.31650-1-laurent@vivier.eu> References: <20170627191221.31650-1-laurent@vivier.eu> X-Provags-ID: V03:K0:xT0eSLcInHwlE3dflQa3PD/i/tOOkOky9rH0BKWS4JJzgQRr4Lc K5v4RSyz7lEKTkH20jD/C04VI7oci5aoPIsFjHTx0DwgHn7GUvMeq0LU9qT49/f2bB7cTgT wQk75Toq5HBG4dPovWYvRI24b27KAX7L979LJQ9Fzh9e3HW9xp2ZtUay6tikoMVaPNEj3ff ooPlQKSswns7pB9j/gmYQ== X-UI-Out-Filterresults: notjunk:1; V01:K0:Rv2+LqCpflY=:O+lfFsZjeUbUorSkFBXeM7 MRBPlYdbRoOo6kv3ivE8L9uvO5rOp+2gfaWrflQItWEKLl2tOJ1frSdOP6ULgtQguhpLq+yZ2 ZZ3rGcbU3UVG9PnUnqUdkl/sblccGTtX8PtsZRHYI0OLCtojch4cHncjXTMqguAG54Ta4Zi+K SCG6vR5fjDcDkZNrRPg3YVRoXIqrbAFT5hNlj9vaANTnRoS5p5B01cONppN5zFXFA5/V0ttnW zp1bwpDSkWuby2Jj2cmlfWPfEt5TZQN+ftsmTAhuBfcgByBwRS/GDjPX2cauV6768+Vf4t1Of UyDIvA3zuDAWEXDbXC3eKuUfnHtknE7fJhadwUNobcuGfujshAvoQOfrm5JigHhH+DCLfEvDx 82UMkRNAV0oHt/4l7rRTDfwqiDZlNqcUXHLUHB483A3cKvjaW7EEfO6tgRI3iMHJ2LW6H9I4B 5e2wXiV0T98++KUvBFwWwmfI9F+2PXbmardzjcQE+7SFomEVvpN59ZGxKsAuKf4ZfQb1XC6rm VGs91uGpdXnSAV1lNIv0wcX0aQ5FfVJ5IerEGpAvw9Fvy/zwu9fiplS2TUPYwyA2eaOqTafUf kb/CXtr7rI9qqTS/EnmLBSQCERTvkTCB18F9slOveWHMuTnKzMvAMHdeXf1KjE+63FIdsO8rr HsWXfLOPdCdN5yuLNxK+8WFV2M0ZwH5lj5QJ3uaTUE29+b/Q5Jupznf0B+l6LLP2NNME= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 212.227.17.24 Subject: [Qemu-devel] [PATCH v3 5/7] target/m68k: add fsglmul and fsgldiv X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" fsglmul and fsgldiv truncate data to single precision before computing results. Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson --- target/m68k/fpu_helper.c | 28 ++++++++++++++++++++++++++++ target/m68k/helper.h | 2 ++ target/m68k/translate.c | 6 ++++++ 3 files changed, 36 insertions(+) diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c index f6b6788..0daad4a 100644 --- a/target/m68k/fpu_helper.c +++ b/target/m68k/fpu_helper.c @@ -249,6 +249,20 @@ void HELPER(fdmul)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) PREC_END(); } +void HELPER(fsglmul)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) +{ + int rounding_mode = get_float_rounding_mode(&env->fp_status); + floatx80 a, b; + + PREC_BEGIN(32); + set_float_rounding_mode(float_round_to_zero, &env->fp_status); + a = floatx80_round(val0->d, &env->fp_status); + b = floatx80_round(val1->d, &env->fp_status); + set_float_rounding_mode(rounding_mode, &env->fp_status); + res->d = floatx80_mul(a, b, &env->fp_status); + PREC_END(); +} + void HELPER(fdiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) { res->d = floatx80_div(val1->d, val0->d, &env->fp_status); @@ -268,6 +282,20 @@ void HELPER(fddiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) PREC_END(); } +void HELPER(fsgldiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) +{ + int rounding_mode = get_float_rounding_mode(&env->fp_status); + floatx80 a, b; + + PREC_BEGIN(32); + set_float_rounding_mode(float_round_to_zero, &env->fp_status); + a = floatx80_round(val1->d, &env->fp_status); + b = floatx80_round(val0->d, &env->fp_status); + set_float_rounding_mode(rounding_mode, &env->fp_status); + res->d = floatx80_div(a, b, &env->fp_status); + PREC_END(); +} + static int float_comp_to_cc(int float_compare) { switch (float_compare) { diff --git a/target/m68k/helper.h b/target/m68k/helper.h index 0c7f06f..f05191b 100644 --- a/target/m68k/helper.h +++ b/target/m68k/helper.h @@ -39,9 +39,11 @@ DEF_HELPER_4(fdsub, void, env, fp, fp, fp) DEF_HELPER_4(fmul, void, env, fp, fp, fp) DEF_HELPER_4(fsmul, void, env, fp, fp, fp) DEF_HELPER_4(fdmul, void, env, fp, fp, fp) +DEF_HELPER_4(fsglmul, void, env, fp, fp, fp) DEF_HELPER_4(fdiv, void, env, fp, fp, fp) DEF_HELPER_4(fsdiv, void, env, fp, fp, fp) DEF_HELPER_4(fddiv, void, env, fp, fp, fp) +DEF_HELPER_4(fsgldiv, void, env, fp, fp, fp) DEF_HELPER_FLAGS_3(fcmp, TCG_CALL_NO_RWG, void, env, fp, fp) DEF_HELPER_FLAGS_2(set_fpcr, TCG_CALL_NO_RWG, void, env, i32) DEF_HELPER_FLAGS_2(ftst, TCG_CALL_NO_RWG, void, env, fp) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 84f78f9..4775770 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -4646,6 +4646,12 @@ DISAS_INSN(fpu) case 0x67: /* fdmul */ gen_helper_fdmul(cpu_env, cpu_dest, cpu_src, cpu_dest); break; + case 0x24: /* fsgldiv */ + gen_helper_fsgldiv(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; + case 0x27: /* fsglmul */ + gen_helper_fsglmul(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; case 0x28: /* fsub */ gen_helper_fsub(cpu_env, cpu_dest, cpu_src, cpu_dest); break;