From patchwork Sun Jun 25 19:21:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 780503 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3wwhyf0JrLz9s3w for ; Mon, 26 Jun 2017 05:27:06 +1000 (AEST) Received: from localhost ([::1]:43577 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dPDBX-0001le-QF for incoming@patchwork.ozlabs.org; Sun, 25 Jun 2017 15:27:03 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46791) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dPD6o-0005xQ-1g for qemu-devel@nongnu.org; Sun, 25 Jun 2017 15:22:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dPD6j-0003o7-B0 for qemu-devel@nongnu.org; Sun, 25 Jun 2017 15:22:10 -0400 Received: from mout.kundenserver.de ([217.72.192.73]:63589) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dPD6i-0003ne-VY for qemu-devel@nongnu.org; Sun, 25 Jun 2017 15:22:05 -0400 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue104 [212.227.15.183]) with ESMTPSA (Nemesis) id 0MS2e2-1dJG1X2Boo-00THQ7; Sun, 25 Jun 2017 21:21:33 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Sun, 25 Jun 2017 21:21:25 +0200 Message-Id: <20170625192125.9992-8-laurent@vivier.eu> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170625192125.9992-1-laurent@vivier.eu> References: <20170625192125.9992-1-laurent@vivier.eu> X-Provags-ID: V03:K0:3Xvo+IODugW5Enl31Gt0RG2K5+d1+DuFjS3+Tdr62oxovcZbOwz 36Peh3dYjYCdlKcuGJhOAHIUMuxduXvs17HjKRT7zVLpZMURx9Sbj/V46ZUV23tWtlRUmNQ R3Y7tfoa6Wqnm3QUVfRz0axS4nsoUTG5K3iDNVoEMM+LenkHY3XtzyjbI4+rAsUsDRqzbZG MRuJDQGmMVdam44IvbM8A== X-UI-Out-Filterresults: notjunk:1; V01:K0:KJ691hOOr24=:d2uZDiB568grP0Hu8sQHVk C/tF1D05fkX7zK/Wrg3C5s6h6+xqdNZkVnjX8UWdFUVc/EHqv6QRDkz4QGStkeXHGssNmC67b x9V7wzT8O/gG/pMtZFVkhwyHaoASHfynAL3ny9QZaOFNSnm76801w7fAa/aOThnaPwnMG7mNX 99+o6g5NSkzmQEh5bspTB2UvZy9rILo9c1Aw/naJCuuFdddwc7gGdq9RoqGUyFw6jPmObPnTE dMkb1dqkATvjNd+h7F58ab9Ar60hhFE89qhZy+6xfXgEjtY1InLeh3F2Di58G3Vs3A1qvQaj5 Mx1DAOH6JFJ46TrbRvH96RXBMt7Th8wxvIBbjZ6QEwWkheyMKFpbmOeN0jximsG9nPLy8HDJf Lqmfz58cT+6XQd52gOkjvRWNopbnwtBcU1OQGvvxwiQgPSjpqpL8Q9WAt4A69jZKJbMTKv1by dqqLJ5foRU9T3admRvJbkAIrW4u+HfIYJDWlu5fp1kN6elZXodgz8xe809Qt5Yh6U4iig+HYj ZGAk0cCQz+xZGOmnWThp0AW0V29ienEVaSEzn3mfODHGUfbModZvP3ABxAyJay0ctJdztaxio 7Uc4r3HieTFJykAAWcMK86dNCpYBArLpeafkQRqPixCe/mQT87fqHfyNUBSGxo0uAAFl0cKTV 9ixy24t4umqoWCx59Dbc0BTOLVANt1Vws8pT9XvReeCwmK+ZyKL4jjsrqGCJi3lCoqoI= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 217.72.192.73 Subject: [Qemu-devel] [PATCH 7/7] target/m68k: add fmovem X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Laurent Vivier --- target/m68k/fpu_helper.c | 103 +++++++++++++++++++++++++++++++++++++++++++++++ target/m68k/helper.h | 1 + target/m68k/translate.c | 59 +++++++++++++-------------- 3 files changed, 133 insertions(+), 30 deletions(-) diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c index 38370d0..3e765d6 100644 --- a/target/m68k/fpu_helper.c +++ b/target/m68k/fpu_helper.c @@ -22,6 +22,7 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "exec/exec-all.h" +#include "exec/cpu_ldst.h" static const floatx80 fpu_rom[128] = { [0x00] = floatx80_pi, /* Pi */ @@ -378,3 +379,105 @@ void HELPER(fconst)(CPUM68KState *env, FPReg *val, uint32_t offset) { val->d = fpu_rom[offset]; } + +static void cpu_ld_floatx80_ra(CPUM68KState *env, FPReg *fp, uint32_t addr, + uintptr_t ra) +{ + uint32_t high; + uint64_t low; + + high = cpu_ldl_data_ra(env, addr, ra); + low = cpu_ldq_data_ra(env, addr + 4, ra); + + fp->l.upper = high >> 16; + fp->l.lower = low; +} + +static void cpu_st_floatx80_ra(CPUM68KState *env, uint32_t addr, FPReg *fp, + uintptr_t ra) +{ + cpu_stl_data_ra(env, addr, fp->l.upper << 16, ra); + cpu_stq_data_ra(env, addr + 4, fp->l.lower, ra); +} + +static void cpu_ld_float64_ra(CPUM68KState *env, FPReg *fp, uint32_t addr, + uintptr_t ra) +{ + uint64_t val; + + val = cpu_ldq_data_ra(env, addr, ra); + fp->d = float64_to_floatx80(*(float64 *)&val, &env->fp_status); +} + +static void cpu_st_float64_ra(CPUM68KState *env, uint32_t addr, FPReg *fp, + uintptr_t ra) +{ + float64 val; + + val = floatx80_to_float64(fp->d, &env->fp_status); + cpu_stq_data_ra(env, addr, *(uint64_t *)&val, ra); +} + +uint32_t HELPER(fmovem)(CPUM68KState *env, uint32_t addr, uint32_t ext) +{ + uintptr_t ra = GETPC(); + int mode = (ext >> 11) & 0x3; + int is_load = ((ext & 0x2000) == 0); + uint16_t mask; + int incr, i; + + if (m68k_feature(env, M68K_FEATURE_FPU)) { + incr = 12; + } else { + incr = 8; + } + + if ((mode & 0x1) == 1) { + /* Dynamic register list */ + int reg = extract32(ext, 4, 3); + mask = env->dregs[reg] & 0x00FF; + } else { + /* Static register list */ + mask = ext & 0x00FF; + } + + if (!is_load && (mode & 2) == 0) { + /* predecrement addressing mode + * only available to store register to memory + */ + for (i = 7; i >= 0; i--, mask <<= 1) { + if (mask & 0x80) { + if (incr == 8) { + cpu_st_float64_ra(env, addr, &env->fregs[i], ra); + } else { + cpu_st_floatx80_ra(env, addr, &env->fregs[i], ra); + } + if ((mask & 0xff) != 0x80) { + addr -= incr; + } + } + } + return addr; + } + /* postincrement addressing mode */ + for (i = 0; i < 8; i++, mask <<= 1) { + if (mask & 0x80) { + if (is_load) { + if (incr == 8) { + cpu_ld_float64_ra(env, &env->fregs[i], addr, ra); + } else { + cpu_ld_floatx80_ra(env, &env->fregs[i], addr, ra); + } + } else { + if (incr == 8) { + cpu_st_float64_ra(env, addr, &env->fregs[i], ra); + } else { + cpu_st_floatx80_ra(env, addr, &env->fregs[i], ra); + } + } + addr += incr; + } + } + + return addr; +} diff --git a/target/m68k/helper.h b/target/m68k/helper.h index b396899..eb3d243 100644 --- a/target/m68k/helper.h +++ b/target/m68k/helper.h @@ -54,6 +54,7 @@ DEF_HELPER_FLAGS_3(fcmp, TCG_CALL_NO_RWG, void, env, fp, fp) DEF_HELPER_FLAGS_2(set_fpcr, TCG_CALL_NO_RWG, void, env, i32) DEF_HELPER_FLAGS_2(ftst, TCG_CALL_NO_RWG, void, env, fp) DEF_HELPER_3(fconst, void, env, fp, i32) +DEF_HELPER_3(fmovem, i32, env, i32, i32) DEF_HELPER_3(mac_move, void, env, i32, i32) DEF_HELPER_3(macmulf, i64, env, i32, i32) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 3a1bdc1..5061619 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -4505,6 +4505,32 @@ static void gen_op_fmove_fcr(CPUM68KState *env, DisasContext *s, tcg_temp_free_i32(addr); } +static void gen_op_fmovem(CPUM68KState *env, DisasContext *s, + uint32_t insn, uint32_t ext) +{ + int opsize; + TCGv addr, tmp; + + if (m68k_feature(s->env, M68K_FEATURE_FPU)) { + opsize = OS_EXTENDED; + } else { + opsize = OS_DOUBLE; /* FIXME */ + } + + addr = gen_lea(env, s, insn, opsize); + if (IS_NULL_QREG(addr)) { + gen_addr_fault(s); + return; + } + + tmp = tcg_const_i32(ext); + gen_helper_fmovem(tmp, cpu_env, addr, tmp); + if ((insn & 070) == 030 || (insn & 070) == 040) { + tcg_gen_mov_i32(AREG(insn, 0), tmp); + } + tcg_temp_free(tmp); +} + /* ??? FP exceptions are not implemented. Most exceptions are deferred until immediately before the next FP instruction is executed. */ DISAS_INSN(fpu) @@ -4512,7 +4538,6 @@ DISAS_INSN(fpu) uint16_t ext; uint8_t rom_offset; int opmode; - TCGv tmp32; int opsize; TCGv_ptr cpu_src, cpu_dest; @@ -4548,36 +4573,10 @@ DISAS_INSN(fpu) return; case 6: /* fmovem */ case 7: - { - TCGv addr; - TCGv_ptr fp; - uint16_t mask; - int i; - if ((ext & 0x1f00) != 0x1000 || (ext & 0xff) == 0) - goto undef; - tmp32 = gen_lea(env, s, insn, OS_LONG); - if (IS_NULL_QREG(tmp32)) { - gen_addr_fault(s); - return; - } - addr = tcg_temp_new_i32(); - tcg_gen_mov_i32(addr, tmp32); - mask = 0x80; - fp = tcg_temp_new_ptr(); - for (i = 0; i < 8; i++) { - if (ext & mask) { - tcg_gen_addi_ptr(fp, cpu_env, - offsetof(CPUM68KState, fregs[i])); - gen_ldst_fp(s, OS_DOUBLE, addr, fp, - (ext & (1 << 13)) ? EA_STORE : EA_LOADS); - if (ext & (mask - 1)) - tcg_gen_addi_i32(addr, addr, 8); - } - mask >>= 1; - } - tcg_temp_free_i32(addr); - tcg_temp_free_ptr(fp); + if ((ext & 0x1000) == 0 && !m68k_feature(s->env, M68K_FEATURE_FPU)) { + goto undef; } + gen_op_fmovem(env, s, insn, ext); return; } if (ext & (1 << 14)) {