From patchwork Sun Jun 25 19:21:22 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 780496 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3wwhw84txDz9s5L for ; Mon, 26 Jun 2017 05:24:56 +1000 (AEST) Received: from localhost ([::1]:43565 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dPD9S-0008IC-A9 for incoming@patchwork.ozlabs.org; Sun, 25 Jun 2017 15:24:54 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46779) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dPD6m-0005x9-J9 for qemu-devel@nongnu.org; Sun, 25 Jun 2017 15:22:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dPD6h-0003na-Sj for qemu-devel@nongnu.org; Sun, 25 Jun 2017 15:22:08 -0400 Received: from mout.kundenserver.de ([217.72.192.74]:64690) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dPD6h-0003nI-H0 for qemu-devel@nongnu.org; Sun, 25 Jun 2017 15:22:03 -0400 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue104 [212.227.15.183]) with ESMTPSA (Nemesis) id 0MTgXI-1dGVw32RSy-00QWGL; Sun, 25 Jun 2017 21:21:31 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Sun, 25 Jun 2017 21:21:22 +0200 Message-Id: <20170625192125.9992-5-laurent@vivier.eu> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170625192125.9992-1-laurent@vivier.eu> References: <20170625192125.9992-1-laurent@vivier.eu> X-Provags-ID: V03:K0:4H5NbaUzJ6dSHZYnC3gZojX3C42fjn+DC3tTIZSMsem9HwnAoXE DRBdKoHplqlnI9JTa7VMTF9IQRwP6cOTcTKxLxuwTcv4vIdKk94owF7skmHzgWuWBfPsnEp xCA4vRRXo0oNUegDmw+v801kYk4/a7tn16mpZyNc4THfI5WtV5ymektpQiTN8mSU3XB6wZm cQOD+8q5Uf5Ox26NuyLRg== X-UI-Out-Filterresults: notjunk:1; V01:K0:JqV9FYlpQw8=:Zzkp5vLrQWpNWrTHMs2oo4 6BFq4PdPnerdhz0GIOz3L9Fhp8LTRzsIdNPL5DCTWG/b7pyyhpuvv0xLih6O0Uq8hWMljWhq9 c2QmqoJcrGXHUB/cQn/fcSq+78+ZX7qjx9gzDUgjh/FajJLBJ/ImOy3uhO442C/OS6YMbRqww fJRVzmL7vqQJyYWXJOBOv7Vbj/6a9MxmzfINs31rPnPTHTVNN59TMoh2teyio1hwPwinCW6/F kk6ReG5Hzx6LW71KrOrg+N7OiwIW8otcJ4YyYvZIE3H5+McEVqjBI/17AJBIxLukIuLjRNUzK eo5e12C36j0WI06ZfvX23Q1aJpiETumK/Puct1OJLoHr8Gqv/YnH2u3lhzZZNQeTE6IsAohAs eiHPIpCAeRPsN4rdcrlzX2ef2wu+S/AAod4YX01abrweReY0+y1sqq7i3DckJRYg4qAqT4UWz 7ybXgDs6HJnfFZRRI9+6r1btKpNIzfQQ1l2tejBlO1SjAOLet1OxY/OxyDz8mQjOTQZL1ZyJC qziRdme3h99WI4wWy+7zW5RAas0sWXtzpITcmOHT2MA53DyBZbWbvDEhP9pBkerNjPDOhstce azgKx5v8FT9b9k3kUpZu3eO31VpWsqIOv3AzOhSvuSnzeww08XsmsdcSv4jKmQP3Xxml0Ovu4 vljaoVeKdORxtDzp2bed9yDPt4KMeh4r0sh8j3LoXqH06WKi0bMHuCxX5edwb4tn3zvE= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 217.72.192.74 Subject: [Qemu-devel] [PATCH 4/7] target/m68k: add explicit single and double precision operations X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Add fssqrt, fdsqrt, fsadd, fdadd, fssub, fdsub, fsmul, fdmul, fsdiv, fddiv. The precision is managed using set_floatx80_rounding_precision(). Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson --- target/m68k/fpu_helper.c | 80 ++++++++++++++++++++++++++++++++++++++++++++++++ target/m68k/helper.h | 10 ++++++ target/m68k/translate.c | 40 +++++++++++++++++++++--- 3 files changed, 125 insertions(+), 5 deletions(-) diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c index 0d83925..3518863 100644 --- a/target/m68k/fpu_helper.c +++ b/target/m68k/fpu_helper.c @@ -153,11 +153,35 @@ void HELPER(set_fpcr)(CPUM68KState *env, uint32_t val) cpu_m68k_set_fpcr(env, val); } +#define PREC_BEGIN(prec) \ + do { \ + int old; \ + old = get_floatx80_rounding_precision(&env->fp_status); \ + set_floatx80_rounding_precision(prec, &env->fp_status) \ + +#define PREC_END() \ + set_floatx80_rounding_precision(old, &env->fp_status); \ + } while (0) + void HELPER(fsqrt)(CPUM68KState *env, FPReg *res, FPReg *val) { res->d = floatx80_sqrt(val->d, &env->fp_status); } +void HELPER(fssqrt)(CPUM68KState *env, FPReg *res, FPReg *val) +{ + PREC_BEGIN(32); + res->d = floatx80_sqrt(val->d, &env->fp_status); + PREC_END(); +} + +void HELPER(fdsqrt)(CPUM68KState *env, FPReg *res, FPReg *val) +{ + PREC_BEGIN(64); + res->d = floatx80_sqrt(val->d, &env->fp_status); + PREC_END(); +} + void HELPER(fabs)(CPUM68KState *env, FPReg *res, FPReg *val) { res->d = floatx80_abs(val->d); @@ -173,16 +197,58 @@ void HELPER(fadd)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) res->d = floatx80_add(val0->d, val1->d, &env->fp_status); } +void HELPER(fsadd)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) +{ + PREC_BEGIN(32); + res->d = floatx80_add(val0->d, val1->d, &env->fp_status); + PREC_END(); +} + +void HELPER(fdadd)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) +{ + PREC_BEGIN(64); + res->d = floatx80_add(val0->d, val1->d, &env->fp_status); + PREC_END(); +} + void HELPER(fsub)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) { res->d = floatx80_sub(val1->d, val0->d, &env->fp_status); } +void HELPER(fssub)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) +{ + PREC_BEGIN(32); + res->d = floatx80_sub(val1->d, val0->d, &env->fp_status); + PREC_END(); +} + +void HELPER(fdsub)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) +{ + PREC_BEGIN(64); + res->d = floatx80_sub(val1->d, val0->d, &env->fp_status); + PREC_END(); +} + void HELPER(fmul)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) { res->d = floatx80_mul(val0->d, val1->d, &env->fp_status); } +void HELPER(fsmul)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) +{ + PREC_BEGIN(32); + res->d = floatx80_mul(val0->d, val1->d, &env->fp_status); + PREC_END(); +} + +void HELPER(fdmul)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) +{ + PREC_BEGIN(64); + res->d = floatx80_mul(val0->d, val1->d, &env->fp_status); + PREC_END(); +} + void HELPER(fsglmul)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) { float32 a, b, c; @@ -199,6 +265,20 @@ void HELPER(fdiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) res->d = floatx80_div(val1->d, val0->d, &env->fp_status); } +void HELPER(fsdiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) +{ + PREC_BEGIN(32); + res->d = floatx80_div(val1->d, val0->d, &env->fp_status); + PREC_END(); +} + +void HELPER(fddiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) +{ + PREC_BEGIN(64); + res->d = floatx80_div(val1->d, val0->d, &env->fp_status); + PREC_END(); +} + void HELPER(fsgldiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) { float32 a, b, c; diff --git a/target/m68k/helper.h b/target/m68k/helper.h index 5a006de..f05191b 100644 --- a/target/m68k/helper.h +++ b/target/m68k/helper.h @@ -26,13 +26,23 @@ DEF_HELPER_2(reds32, s32, env, fp) DEF_HELPER_3(firound, void, env, fp, fp) DEF_HELPER_3(fitrunc, void, env, fp, fp) DEF_HELPER_3(fsqrt, void, env, fp, fp) +DEF_HELPER_3(fssqrt, void, env, fp, fp) +DEF_HELPER_3(fdsqrt, void, env, fp, fp) DEF_HELPER_3(fabs, void, env, fp, fp) DEF_HELPER_3(fchs, void, env, fp, fp) DEF_HELPER_4(fadd, void, env, fp, fp, fp) +DEF_HELPER_4(fsadd, void, env, fp, fp, fp) +DEF_HELPER_4(fdadd, void, env, fp, fp, fp) DEF_HELPER_4(fsub, void, env, fp, fp, fp) +DEF_HELPER_4(fssub, void, env, fp, fp, fp) +DEF_HELPER_4(fdsub, void, env, fp, fp, fp) DEF_HELPER_4(fmul, void, env, fp, fp, fp) +DEF_HELPER_4(fsmul, void, env, fp, fp, fp) +DEF_HELPER_4(fdmul, void, env, fp, fp, fp) DEF_HELPER_4(fsglmul, void, env, fp, fp, fp) DEF_HELPER_4(fdiv, void, env, fp, fp, fp) +DEF_HELPER_4(fsdiv, void, env, fp, fp, fp) +DEF_HELPER_4(fddiv, void, env, fp, fp, fp) DEF_HELPER_4(fsgldiv, void, env, fp, fp, fp) DEF_HELPER_FLAGS_3(fcmp, TCG_CALL_NO_RWG, void, env, fp, fp) DEF_HELPER_FLAGS_2(set_fpcr, TCG_CALL_NO_RWG, void, env, i32) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index a50bf5f..22d499f 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -4604,33 +4604,63 @@ DISAS_INSN(fpu) case 3: /* fintrz */ gen_helper_fitrunc(cpu_env, cpu_dest, cpu_src); break; - case 4: case 0x41: case 0x45: /* fsqrt */ + case 4: /* fsqrt */ gen_helper_fsqrt(cpu_env, cpu_dest, cpu_src); break; + case 0x41: /* fssqrt */ + gen_helper_fssqrt(cpu_env, cpu_dest, cpu_src); + break; + case 0x45: /* fdsqrt */ + gen_helper_fdsqrt(cpu_env, cpu_dest, cpu_src); + break; case 0x18: case 0x58: case 0x5c: /* fabs */ gen_helper_fabs(cpu_env, cpu_dest, cpu_src); break; case 0x1a: case 0x5a: case 0x5e: /* fneg */ gen_helper_fchs(cpu_env, cpu_dest, cpu_src); break; - case 0x20: case 0x60: case 0x64: /* fdiv */ + case 0x20: /* fdiv */ gen_helper_fdiv(cpu_env, cpu_dest, cpu_src, cpu_dest); break; - case 0x22: case 0x62: case 0x66: /* fadd */ + case 0x60: /* fsdiv */ + gen_helper_fsdiv(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; + case 0x64: /* fddiv */ + gen_helper_fddiv(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; + case 0x22: /* fadd */ gen_helper_fadd(cpu_env, cpu_dest, cpu_src, cpu_dest); break; - case 0x23: case 0x63: case 0x67: /* fmul */ + case 0x62: /* fsadd */ + gen_helper_fsadd(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; + case 0x66: /* fdadd */ + gen_helper_fdadd(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; + case 0x23: /* fmul */ gen_helper_fmul(cpu_env, cpu_dest, cpu_src, cpu_dest); break; + case 0x63: /* fsmul */ + gen_helper_fsmul(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; + case 0x67: /* fdmul */ + gen_helper_fdmul(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; case 0x24: /* fsgldiv */ gen_helper_fsgldiv(cpu_env, cpu_dest, cpu_src, cpu_dest); break; case 0x27: /* fsglmul */ gen_helper_fsglmul(cpu_env, cpu_dest, cpu_src, cpu_dest); break; - case 0x28: case 0x68: case 0x6c: /* fsub */ + case 0x28: /* fsub */ gen_helper_fsub(cpu_env, cpu_dest, cpu_src, cpu_dest); break; + case 0x68: /* fssub */ + gen_helper_fssub(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; + case 0x6c: /* fdsub */ + gen_helper_fdsub(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; case 0x38: /* fcmp */ gen_helper_fcmp(cpu_env, cpu_src, cpu_dest); return;