From patchwork Thu Jun 15 08:17:11 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 776171 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3wpGbM0YYXz9s65 for ; Thu, 15 Jun 2017 18:18:07 +1000 (AEST) Received: from localhost ([::1]:52674 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dLPye-0007wM-L2 for incoming@patchwork.ozlabs.org; Thu, 15 Jun 2017 04:18:04 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34647) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dLPxw-0007uK-7B for qemu-devel@nongnu.org; Thu, 15 Jun 2017 04:17:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dLPxs-0001ui-QN for qemu-devel@nongnu.org; Thu, 15 Jun 2017 04:17:20 -0400 Received: from mout.kundenserver.de ([212.227.126.135]:54960) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dLPxs-0001uC-Dw for qemu-devel@nongnu.org; Thu, 15 Jun 2017 04:17:16 -0400 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue003 [212.227.15.167]) with ESMTPSA (Nemesis) id 0LsdiP-1doP593qPZ-012DvZ; Thu, 15 Jun 2017 10:17:15 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Thu, 15 Jun 2017 10:17:11 +0200 Message-Id: <20170615081711.25347-5-laurent@vivier.eu> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170615081711.25347-1-laurent@vivier.eu> References: <20170615081711.25347-1-laurent@vivier.eu> X-Provags-ID: V03:K0:ZhTtVRL0ASeqNqvCZvPRgxcAtAu8r5SznJjBA5wPacvE3Gv4KuI 81KoL1niSfb4WXXwBkWrDNi/Eqqk4fHqaeCJ7CbIV5WwO2/dugGLC9Iu9Fn+vZwO3EAuJdG Sr0N1HcO2umDvSZ3kiw1ZikYRM6/oUtnorI82KfbYpC0SmCgTSo7PBSLhQSCgpaGQ0or03u cD5bXXKz1HYET01nAOAmQ== X-UI-Out-Filterresults: notjunk:1; V01:K0:57TplK5o4yI=:Ko0YPjzf2nzeU0ZGwEcxWf DEigpsNy08vXWwzYOghU//IUQYQwhJSPaxukr5+iVcDkSpYpoAjRZvxADmnvmanwLLWDqDhKK 6F8hJJgrHenS9yFYnsiLlnSIY8vlWNtE22uKLLSt7uwa1vtFIdJf/dLfnQQzlaXgtHRJJDFNx SHDdJ7Ml/enD/2j1z+XYQ+ZGU3P4y2Tq/IrN+PVM/24bXY0vPf/uxyC3z0d36Nbl50qLgSTlb Lo6PaKY3eqJ9v2EroeEe0YLNKCh7g05UFzstnUvLPB0/Zwhd4cc2K2hvZ6hayeyL0elTr0cHq sXETXvc7gg54bzMERsVLtvnjAtZSf1hCGjx8m7LCydEtoqQ2g0/pUUzLaBAi4yP4PI/M+wk+B O1QS13bIFTMOjHTDR4DEvtZ6b1QWkWj95upgS9IlK38yYyzHcHMUtJd/Shq9cXprrpEY2iicV OUI9cbchVrphETqU1Od2YQq8FJVIuyjmFqBWShA7fIqIwFwqueWNsKDyMYMiD4Y7ANjrEEqgY Wje7JrQxzkZ7CpD5TTVneIPemg7N8iRQgmGyMBUfeuaKCwR4MOZZylbIFhIZJ2u6+xE6alHbE zZuiZRSnTdYcNq+CRO4u3PWImuCx7A/+W8VoiT4bpo+AlBM+TKJ6YMrq0Tf8UIsBuXBR7PooY Jll7abV5eYfwFPwdsDA81gQ7HuKh3IeU2lqTyP48oHzjD5l22vqZG9jKTM1LlNptQNQg= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 212.227.126.135 Subject: [Qemu-devel] [PULL 4/4] target-m68k: define ext_opsize X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson Message-Id: <20170611231633.32582-4-laurent@vivier.eu> --- target/m68k/translate.c | 43 ++++++++++++++++++++++++------------------- 1 file changed, 24 insertions(+), 19 deletions(-) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 52653f6..dfecfb6 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -669,6 +669,21 @@ static inline int insn_opsize(int insn) } } +static inline int ext_opsize(int ext, int pos) +{ + switch ((ext >> pos) & 7) { + case 0: return OS_LONG; + case 1: return OS_SINGLE; + case 2: return OS_EXTENDED; + case 3: return OS_PACKED; + case 4: return OS_WORD; + case 5: return OS_DOUBLE; + case 6: return OS_BYTE; + default: + g_assert_not_reached(); + } +} + /* Assign value to a register. If the width is less than the register width only the low part of the register is set. */ static void gen_partset_reg(int opsize, TCGv reg, TCGv val) @@ -4111,20 +4126,19 @@ DISAS_INSN(fpu) tmp32 = tcg_temp_new_i32(); /* fmove */ /* ??? TODO: Proper behavior on overflow. */ - switch ((ext >> 10) & 7) { - case 0: - opsize = OS_LONG; + + opsize = ext_opsize(ext, 10); + switch (opsize) { + case OS_LONG: gen_helper_f64_to_i32(tmp32, cpu_env, src); break; - case 1: - opsize = OS_SINGLE; + case OS_SINGLE: gen_helper_f64_to_f32(tmp32, cpu_env, src); break; - case 4: - opsize = OS_WORD; + case OS_WORD: gen_helper_f64_to_i32(tmp32, cpu_env, src); break; - case 5: /* OS_DOUBLE */ + case OS_DOUBLE: tcg_gen_mov_i32(tmp32, AREG(insn, 0)); switch ((insn >> 3) & 7) { case 2: @@ -4153,8 +4167,7 @@ DISAS_INSN(fpu) } tcg_temp_free_i32(tmp32); return; - case 6: - opsize = OS_BYTE; + case OS_BYTE: gen_helper_f64_to_i32(tmp32, cpu_env, src); break; default: @@ -4227,15 +4240,7 @@ DISAS_INSN(fpu) } if (ext & (1 << 14)) { /* Source effective address. */ - switch ((ext >> 10) & 7) { - case 0: opsize = OS_LONG; break; - case 1: opsize = OS_SINGLE; break; - case 4: opsize = OS_WORD; break; - case 5: opsize = OS_DOUBLE; break; - case 6: opsize = OS_BYTE; break; - default: - goto undef; - } + opsize = ext_opsize(ext, 10); if (opsize == OS_DOUBLE) { tmp32 = tcg_temp_new_i32(); tcg_gen_mov_i32(tmp32, AREG(insn, 0));