From patchwork Mon May 29 19:24:14 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 768320 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3wc6Rr2t1wz9s3w for ; Tue, 30 May 2017 05:36:23 +1000 (AEST) Received: from localhost ([::1]:50210 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dFQSg-00079m-Jw for incoming@patchwork.ozlabs.org; Mon, 29 May 2017 15:36:18 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38824) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dFQHc-0006Tx-FK for qemu-devel@nongnu.org; Mon, 29 May 2017 15:24:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dFQHa-00073o-8O for qemu-devel@nongnu.org; Mon, 29 May 2017 15:24:52 -0400 Received: from hall.aurel32.net ([2001:bc8:30d7:100::1]:42890) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dFQHZ-00072Z-Uy for qemu-devel@nongnu.org; Mon, 29 May 2017 15:24:50 -0400 Received: from [2001:bc8:30d7:120:9bb5:8936:7e6a:9e36] (helo=ohm.rr44.fr) by hall.aurel32.net with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1dFQHX-0007Mp-9w; Mon, 29 May 2017 21:24:47 +0200 Received: from aurel32 by ohm.rr44.fr with local (Exim 4.89) (envelope-from ) id 1dFQHU-0001a8-IP; Mon, 29 May 2017 21:24:44 +0200 From: Aurelien Jarno To: qemu-devel@nongnu.org Date: Mon, 29 May 2017 21:24:14 +0200 Message-Id: <20170529192440.5990-4-aurelien@aurel32.net> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170529192440.5990-1-aurelien@aurel32.net> References: <20170529192440.5990-1-aurelien@aurel32.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:bc8:30d7:100::1 Subject: [Qemu-devel] [PATCH v2 03/29] target/s390x: implement local-TLB-clearing in IPTE X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexander Graf , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" And at the same time make IPTE SMP aware. Signed-off-by: Aurelien Jarno Reviewed-by: Thomas Huth Reviewed-by: Richard Henderson --- target/s390x/helper.h | 2 +- target/s390x/mem_helper.c | 19 ++++++++++++------- target/s390x/translate.c | 6 +++++- 3 files changed, 18 insertions(+), 9 deletions(-) diff --git a/target/s390x/helper.h b/target/s390x/helper.h index cc451c70a6..3f5a05d43b 100644 --- a/target/s390x/helper.h +++ b/target/s390x/helper.h @@ -111,7 +111,7 @@ DEF_HELPER_4(mvcs, i32, env, i64, i64, i64) DEF_HELPER_4(mvcp, i32, env, i64, i64, i64) DEF_HELPER_4(sigp, i32, env, i64, i32, i64) DEF_HELPER_FLAGS_2(sacf, TCG_CALL_NO_WG, void, env, i64) -DEF_HELPER_FLAGS_3(ipte, TCG_CALL_NO_RWG, void, env, i64, i64) +DEF_HELPER_FLAGS_4(ipte, TCG_CALL_NO_RWG, void, env, i64, i64, i32) DEF_HELPER_FLAGS_1(ptlb, TCG_CALL_NO_RWG, void, env) DEF_HELPER_FLAGS_1(purge, TCG_CALL_NO_RWG, void, env) DEF_HELPER_2(lra, i64, env, i64) diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 0ebd65d9ab..9fbe7c9ef9 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -1073,14 +1073,13 @@ uint32_t HELPER(mvcp)(CPUS390XState *env, uint64_t l, uint64_t a1, uint64_t a2) } /* invalidate pte */ -void HELPER(ipte)(CPUS390XState *env, uint64_t pto, uint64_t vaddr) +void HELPER(ipte)(CPUS390XState *env, uint64_t pto, uint64_t vaddr, + uint32_t m4) { CPUState *cs = CPU(s390_env_get_cpu(env)); uint64_t page = vaddr & TARGET_PAGE_MASK; uint64_t pte_addr, pte; - /* XXX broadcast to other CPUs */ - /* Compute the page table entry address */ pte_addr = (pto & _SEGMENT_ENTRY_ORIGIN); pte_addr += (vaddr & _VADDR_PX) >> 9; @@ -1092,13 +1091,19 @@ void HELPER(ipte)(CPUS390XState *env, uint64_t pto, uint64_t vaddr) /* XXX we exploit the fact that Linux passes the exact virtual address here - it's not obliged to! */ - tlb_flush_page(cs, page); + /* XXX: the LC bit should be considered as 0 if the local-TLB-clearing + facility is not installed. */ + if (m4 & 1) { + tlb_flush_page(cs, page); + } else { + tlb_flush_page_all_cpus_synced(cs, page); + } /* XXX 31-bit hack */ - if (page & 0x80000000) { - tlb_flush_page(cs, page & ~0x80000000); + if (m4 & 1) { + tlb_flush_page(cs, page ^ 0x80000000); } else { - tlb_flush_page(cs, page | 0x80000000); + tlb_flush_page_all_cpus_synced(cs, page ^ 0x80000000); } } diff --git a/target/s390x/translate.c b/target/s390x/translate.c index f7598184a6..f160b62c19 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -2352,8 +2352,12 @@ static ExitStatus op_ipm(DisasContext *s, DisasOps *o) #ifndef CONFIG_USER_ONLY static ExitStatus op_ipte(DisasContext *s, DisasOps *o) { + TCGv_i32 m4; + check_privileged(s); - gen_helper_ipte(cpu_env, o->in1, o->in2); + m4 = tcg_const_i32(get_field(s->fields, m4)); + gen_helper_ipte(cpu_env, o->in1, o->in2, m4); + tcg_temp_free_i32(m4); return NO_EXIT; }