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X-Received-From: 2607:f8b0:400d:c09::233 Subject: Re: [Qemu-devel] [PATCH] target/i386: enable A20 automatically in system management mode X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , "qemu-devel@nongnu.org" Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" On Fri, May 12, 2017 at 11:19:00PM +0000, Xu, Anthony wrote: > > SeaBIOS defaults to enabling A20 and it's a rare beast that disables > > it. One could change x86.h:set_a20 and romlayout.S:transition32 to > > only issue the outb() if the inb() indicates a change is needed. That > > would likely eliminate half the accesses. > > The 350 port 92 access is for write operation only. > If include the inb(), it would be 700, and every time it actually has a change > To be precise, It is about 175 switches from 32 bit to 16 bit, then back to 32 bit. > call16 is called 175 times during Seabios boot without any option rom, > It would be more if some option roms are included. > > > I think A20 is disabled by default in SeaBios. I don't know why you think that. One can check with: What OS / bootloader are you running? -Kevin --- a/src/stacks.c +++ b/src/stacks.c @@ -99,6 +99,8 @@ call32_post(void) if (cr0_caching) cr0_mask(CR0_CD|CR0_NW, cr0_caching); } + if (!get_a20()) + dprintf(1, "a20=0\n"); // Restore cmos index register outb(GET_LOW(Call16Data.cmosindex), PORT_CMOS_INDEX); With the above I only see a handful of cases where SeaBIOS has to restore a20 to a disabled state. The handful I do see are due to cases where yield() is called prior to option rom initialization. Those handful are eliminated for me with the following fix: --- a/src/stacks.c +++ b/src/stacks.c @@ -496,6 +496,7 @@ void thread_setup(void) { CanInterrupt = 1; + call16_override(1); if (! CONFIG_THREADS) return; ThreadControl = romfile_loadint("etc/threads", 1);