From patchwork Tue Feb 7 00:59:15 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 724830 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3vHQz73Fx5z9s2P for ; Tue, 7 Feb 2017 12:01:55 +1100 (AEDT) Received: from localhost ([::1]:51331 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cauAK-000660-U0 for incoming@patchwork.ozlabs.org; Mon, 06 Feb 2017 20:01:52 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:32883) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cau8W-0004jp-Sr for qemu-devel@nongnu.org; Mon, 06 Feb 2017 20:00:02 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cau8S-0005vS-Pb for qemu-devel@nongnu.org; Mon, 06 Feb 2017 20:00:00 -0500 Received: from mout.kundenserver.de ([212.227.126.131]:61946) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cau8S-0005vH-Ey for qemu-devel@nongnu.org; Mon, 06 Feb 2017 19:59:56 -0500 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue004 [212.227.15.167]) with ESMTPSA (Nemesis) id 0MOmdm-1cY8hc2S74-0069X3; Tue, 07 Feb 2017 01:59:34 +0100 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Tue, 7 Feb 2017 01:59:15 +0100 Message-Id: <20170207005930.28327-2-laurent@vivier.eu> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170207005930.28327-1-laurent@vivier.eu> References: <20170207005930.28327-1-laurent@vivier.eu> MIME-Version: 1.0 X-Provags-ID: V03:K0:6ZMFMJWJPK81RVZpRZKGWjg7NUW0fmXEnRP/JMqH8W3JKPJhX/B 4OrztYjq/kafy1/Bwsve6dtLhGAe5WGt79rx4NBl2YS+6ayAxXY0WwexPqsVbSZsTeci7Ou ppR4nneRAv8uGv94TgYBYEznoT9NWrmrfpyvd1aLkAVoGXJlOVowBsx0lYlC1hIWWwhXLBs SbzwKeFrfqq5o+0lHaAxw== X-UI-Out-Filterresults: notjunk:1; V01:K0:iiZMb2FXhRM=:nKuMPRHlTpBsgXz6+73Ujc JEIAgksJ9mp358clp7KjODMSlpxGQmDtBtyFk3n9scKgSHhC7gK94D4FMumT4etGJE9NyvQ+L gqL+6p1lukRXVr6RNlrzHfsFXGrXqbX6GSWCTugD95G1Dp8VFcJziOO7JkiwJOeVLju8oZM6Y jBindV1COt4KPv4Yr/BxgS5M1+eKcQkQ3Pj9Khy1xEJ2jIepBSp/7MLEk9nSEtD96wx/0QTYV Ah59tCdiVwB6yq3oSUs6Fx80UODjpGh1zOPHNpl2j9ob507XX5o+rYF6HqeeyfZTZEaj5lp7N x69M183ghQpYVaRwxsDLT0xj2bT8iHQ38zQZcXgfN5fLQpDG8THmx5UmEkqpeJzKJtmnC6LTP trndiEQEecXpQJnglgYfuobNzDtck50IPNH8v4nIrugsKyu6HYRHo1KmGcEwkl7pBnb7Y7VzB UaLnyAeEr4+Ca/1mg1iDc5QrW//4E8+JLbf0xXrUEDg/BKIweWwYf3/45TRtzwNp7AeULAUjI BQq61Kb8Un8oE8HG+c0lYHzQL8K1eN5X1j1AQievsWAG3QEm537eUOcE67Jw1W6JxY64Bq40I ZfrBLvD91mDl053NyXzPN1Y2NT6H9L+BSDvx/qVy5SigVkvGmDaL287YZCqGXaMWhTLGczd2l +9XX09JJE3e8wlsRxYds/G6XPBxaR8Wz9M5smnpdIk9VtMO2ZFxeLOKtqLE007jc5H91wXaBS kttDCO0zcT1Abk39 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 212.227.126.131 Subject: [Qemu-devel] [PATCH v3 01/16] softfloat: define 680x0 specific values X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Laurent Vivier , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" CC: Peter Maydell Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson --- fpu/softfloat-specialize.h | 34 +++++++++++++++++++++++++++++++--- 1 file changed, 31 insertions(+), 3 deletions(-) diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index 100c8a9..fb70d32 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -111,7 +111,7 @@ float16 float16_default_nan(float_status *status) *----------------------------------------------------------------------------*/ float32 float32_default_nan(float_status *status) { -#if defined(TARGET_SPARC) +#if defined(TARGET_SPARC) || defined(TARGET_M68K) return const_float32(0x7FFFFFFF); #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \ defined(TARGET_XTENSA) || defined(TARGET_S390X) || defined(TARGET_TRICORE) @@ -136,7 +136,7 @@ float32 float32_default_nan(float_status *status) *----------------------------------------------------------------------------*/ float64 float64_default_nan(float_status *status) { -#if defined(TARGET_SPARC) +#if defined(TARGET_SPARC) || defined(TARGET_M68K) return const_float64(LIT64(0x7FFFFFFFFFFFFFFF)); #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \ defined(TARGET_S390X) @@ -162,7 +162,10 @@ float64 float64_default_nan(float_status *status) floatx80 floatx80_default_nan(float_status *status) { floatx80 r; - +#if defined(TARGET_M68K) + r.low = LIT64(0xFFFFFFFFFFFFFFFF); + r.high = 0x7FFF; +#else if (status->snan_bit_is_one) { r.low = LIT64(0xBFFFFFFFFFFFFFFF); r.high = 0x7FFF; @@ -170,6 +173,7 @@ floatx80 floatx80_default_nan(float_status *status) r.low = LIT64(0xC000000000000000); r.high = 0xFFFF; } +#endif return r; } @@ -502,6 +506,30 @@ static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, return 1; } } +#elif defined(TARGET_M68K) +static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, + flag aIsLargerSignificand) +{ + /* M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL + * 3.4 FLOATING-POINT INSTRUCTION DETAILS + * If either operand, but not both operands, of an operation is a + * nonsignaling NaN, then that NaN is returned as the result. If both + * operands are nonsignaling NaNs, then the destination operand + * nonsignaling NaN is returned as the result. + * If either operand to an operation is a signaling NaN (SNaN), then the + * SNaN bit is set in the FPSR EXC byte. If the SNaN exception enable bit + * is set in the FPCR ENABLE byte, then the exception is taken and the + * destination is not modified. If the SNaN exception enable bit is not + * set, setting the SNaN bit in the operand to a one converts the SNaN to + * a nonsignaling NaN. The operation then continues as described in the + * preceding paragraph for nonsignaling NaNs. + */ + if (aIsQNaN || aIsSNaN) { /* a is the destination operand */ + return 0; /* return the destination operand */ + } else { + return 1; /* return b */ + } +} #else static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, flag aIsLargerSignificand)