From patchwork Tue Feb 7 00:59:29 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 724847 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3vHRQM07MWz9s1y for ; Tue, 7 Feb 2017 12:22:03 +1100 (AEDT) Received: from localhost ([::1]:51426 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cauTo-0004UK-J8 for incoming@patchwork.ozlabs.org; Mon, 06 Feb 2017 20:22:00 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33173) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cau9D-0005JI-2G for qemu-devel@nongnu.org; Mon, 06 Feb 2017 20:00:49 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cau97-0006Ew-RB for qemu-devel@nongnu.org; Mon, 06 Feb 2017 20:00:43 -0500 Received: from mout.kundenserver.de ([212.227.126.131]:56273) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cau97-0006DB-8Q for qemu-devel@nongnu.org; Mon, 06 Feb 2017 20:00:37 -0500 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue004 [212.227.15.167]) with ESMTPSA (Nemesis) id 0MFwx8-1cgyOP2ntm-00EuxR; Tue, 07 Feb 2017 01:59:44 +0100 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Tue, 7 Feb 2017 01:59:29 +0100 Message-Id: <20170207005930.28327-16-laurent@vivier.eu> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170207005930.28327-1-laurent@vivier.eu> References: <20170207005930.28327-1-laurent@vivier.eu> X-Provags-ID: V03:K0:otAo2MLwqEQKzwK+CeSE+zupLAG9jmZrIdu1gz5ug121GphRwEI bbWZ21oeeuCWhr5lXo4we6iC6BczcArTId392xbKvvhCUpBDRY7fUG3qv8rC/rMUuRhMXUA vmCA0WxU6cVDDBkvnlhszmzwKK57Q2GjQryM/llh0kyZzFcQuLYH7w1vRvpcGgbafICSdXC QW3dh6amYQxVqDo7GsQ1g== X-UI-Out-Filterresults: notjunk:1; V01:K0:XaoFRu3LdaU=:JooBzAW6ADtLbMa1zYmqvq 1w+YQ7jwxzF1KBMTy3t6rA2t7dzoEznc2s6+JNJiW/BaVT670ukWsnhvouap4qT0pdirqfuSF Q1m2jXIYHrLJXSguNMkPKjeNPAzXKA79T0+4PBNKikiKyI/5am+UzkvFwK7w+K6DlV2FTPal3 1mv3Bm+fOwhprs4ZLPBYSOs55m+ZlKqQJGE8HErGlN9+HjWQD6VpIyzJSxlaQI2kilGGlhjZW 4tPw/Vku65dqiZGWF+jbZ0/6lSkvI2Ha8MeTl+VWND57+qhqgAUbKA0qdGjgc2BbZVjmzgaL/ T6BdDK3ud/8d8FBaBr1M4y5RMyZt31/mS8eN/U/P8alsMuNUIDvtaYSAH/H7jQG3MJIlCPOmw KWvvB6aZNVOutWVSxvTAB22VLxhDs88QZDc0O+8nRCbnw0mcLYSm0YR6CbVXHv6vQjVFCwWig D4+TIc/Ce9E+Ctco5XwN98AJp5yhEIz5K9KVyI9xAYp5RIPv9ZDOam2Unalih+zC6mUuD8A8N RZfRt4in32Mfs+ikLsr3BMndFkQCpegswJG1s4iuCy9F0iYlSNETlesvIBqI9azFWdM9Wn75/ C8RFizEl7biNhxHivc1aBE7lieoEy9/3p6ymqTbzgNreim6pk1IJ5THn0wsXTzHHYikjLjG3q cvfiTi1uAo6W/fRyLgygRGax5eEuxEB2XfpUOWBzpdO+MOEsmLdVI3bgzcyHRJSLILW8= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 212.227.126.131 Subject: [Qemu-devel] [PATCH v3 15/16] target-m68k: add more FPU instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Add fsinh, flognp1, ftanh, fatan, fasin, fatanh, fsin, ftan, fetox, ftwotox, ftentox, flogn, flog10, facos, fcos. As softfloat library does not provide these functions, we us the libm of the host. Signed-off-by: Laurent Vivier --- target/m68k/fpu_helper.c | 237 +++++++++++++++++++++++++++++++++++++++++++++++ target/m68k/helper.h | 16 ++++ target/m68k/translate.c | 48 ++++++++++ 3 files changed, 301 insertions(+) diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c index c69efe1..95d5cc4 100644 --- a/target/m68k/fpu_helper.c +++ b/target/m68k/fpu_helper.c @@ -23,6 +23,7 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "exec/exec-all.h" +#include static const floatx80 fpu_rom[128] = { [0x00] = floatx80_pi, /* Pi */ @@ -712,3 +713,239 @@ void HELPER(mod_FP0_FP1)(CPUM68KState *env) floatx80_to_FP0(env, res); } + +static long double floatx80_to_ldouble(floatx80 val) +{ + if (floatx80_is_infinity(val)) { + if (floatx80_is_neg(val)) { + return -__builtin_infl(); + } + return __builtin_infl(); + } + if (floatx80_is_any_nan(val)) { + char low[20]; + sprintf(low, "0x%016"PRIx64, val.low); + + return nanl(low); + } + + return *(long double *)&val; +} + +static floatx80 ldouble_to_floatx80(long double val) +{ + floatx80 res; + + if (isinf(val)) { + res.high = floatx80_default_nan(NULL).high; + res.low = 0; + } + if (isinf(val) < 0) { + res.high |= 0x8000; + } + if (isnan(val)) { + res.high = floatx80_default_nan(NULL).high; + res.low = *(uint64_t *)((char *)&val + 4); + } + return *(floatx80 *)&val; +} + +void HELPER(sinh_FP0)(CPUM68KState *env) +{ + floatx80 res; + long double val; + + val = sinhl(floatx80_to_ldouble(FP0_to_floatx80(env))); + res = ldouble_to_floatx80(val); + + floatx80_to_FP0(env, res); +} + +void HELPER(lognp1_FP0)(CPUM68KState *env) +{ + floatx80 val; + long double res; + + val = FP0_to_floatx80(env); + res = logl(floatx80_to_ldouble(val) + 1.0); + + floatx80_to_FP0(env, ldouble_to_floatx80(res)); +} + +void HELPER(ln_FP0)(CPUM68KState *env) +{ + floatx80 val; + long double res; + + val = FP0_to_floatx80(env); + res = logl(floatx80_to_ldouble(val)); + + floatx80_to_FP0(env, ldouble_to_floatx80(res)); +} + +void HELPER(log10_FP0)(CPUM68KState *env) +{ + floatx80 val; + long double res; + + val = FP0_to_floatx80(env); + res = log10l(floatx80_to_ldouble(val)); + + floatx80_to_FP0(env, ldouble_to_floatx80(res)); +} + +void HELPER(atan_FP0)(CPUM68KState *env) +{ + floatx80 res; + long double val; + + val = floatx80_to_ldouble(FP0_to_floatx80(env)); + + val = atanl(val); + res = ldouble_to_floatx80(val); + floatx80_to_FP0(env, res); +} + +void HELPER(asin_FP0)(CPUM68KState *env) +{ + floatx80 res; + long double val; + + val = floatx80_to_ldouble(FP0_to_floatx80(env)); + if (val < -1.0 || val > 1.0) { + floatx80_to_FP0(env, floatx80_default_nan(NULL)); + return; + } + + val = asinl(val); + res = ldouble_to_floatx80(val); + floatx80_to_FP0(env, res); +} + +void HELPER(atanh_FP0)(CPUM68KState *env) +{ + floatx80 res; + long double val; + + val = floatx80_to_ldouble(FP0_to_floatx80(env)); + if (val < -1.0 || val > 1.0) { + floatx80_to_FP0(env, floatx80_default_nan(NULL)); + return; + } + + val = atanhl(val); + res = ldouble_to_floatx80(val); + floatx80_to_FP0(env, res); +} + +void HELPER(sin_FP0)(CPUM68KState *env) +{ + floatx80 res; + long double val; + + val = floatx80_to_ldouble(FP0_to_floatx80(env)); + + val = sinl(val); + res = ldouble_to_floatx80(val); + floatx80_to_FP0(env, res); +} + +void HELPER(tanh_FP0)(CPUM68KState *env) +{ + floatx80 res; + long double val; + + val = floatx80_to_ldouble(FP0_to_floatx80(env)); + + val = tanhl(val); + res = ldouble_to_floatx80(val); + floatx80_to_FP0(env, res); +} + +void HELPER(tan_FP0)(CPUM68KState *env) +{ + floatx80 res; + long double val; + + val = floatx80_to_ldouble(FP0_to_floatx80(env)); + + val = tanl(val); + res = ldouble_to_floatx80(val); + floatx80_to_FP0(env, res); +} + +void HELPER(exp_FP0)(CPUM68KState *env) +{ + floatx80 f; + long double res; + + f = FP0_to_floatx80(env); + + res = expl(floatx80_to_ldouble(f)); + + floatx80_to_FP0(env, ldouble_to_floatx80(res)); +} + +void HELPER(exp2_FP0)(CPUM68KState *env) +{ + floatx80 f; + long double res; + + f = FP0_to_floatx80(env); + + res = exp2l(floatx80_to_ldouble(f)); + + floatx80_to_FP0(env, ldouble_to_floatx80(res)); +} + +void HELPER(exp10_FP0)(CPUM68KState *env) +{ + floatx80 res; + long double val; + + val = floatx80_to_ldouble(FP0_to_floatx80(env)); + + val = exp10l(val); + res = ldouble_to_floatx80(val); + floatx80_to_FP0(env, res); +} + +void HELPER(cosh_FP0)(CPUM68KState *env) +{ + floatx80 res; + long double val; + + val = floatx80_to_ldouble(FP0_to_floatx80(env)); + + val = coshl(val); + res = ldouble_to_floatx80(val); + floatx80_to_FP0(env, res); +} + +void HELPER(acos_FP0)(CPUM68KState *env) +{ + floatx80 res; + long double val; + + val = floatx80_to_ldouble(FP0_to_floatx80(env)); + if (val < -1.0 || val > 1.0) { + floatx80_to_FP0(env, floatx80_default_nan(NULL)); + return; + } + + val = acosl(val); + res = ldouble_to_floatx80(val); + floatx80_to_FP0(env, res); +} + +void HELPER(cos_FP0)(CPUM68KState *env) +{ + floatx80 res; + long double val; + + val = floatx80_to_ldouble(FP0_to_floatx80(env)); + + val = cosl(val); + res = ldouble_to_floatx80(val); + floatx80_to_FP0(env, res); +} diff --git a/target/m68k/helper.h b/target/m68k/helper.h index 07aa04f..600a9a6 100644 --- a/target/m68k/helper.h +++ b/target/m68k/helper.h @@ -53,6 +53,22 @@ DEF_HELPER_1(getexp_FP0, void, env) DEF_HELPER_1(getman_FP0, void, env) DEF_HELPER_1(scale_FP0_FP1, void, env) DEF_HELPER_1(mod_FP0_FP1, void, env) +DEF_HELPER_1(sinh_FP0, void, env) +DEF_HELPER_1(lognp1_FP0, void, env) +DEF_HELPER_1(atan_FP0, void, env) +DEF_HELPER_1(asin_FP0, void, env) +DEF_HELPER_1(atanh_FP0, void, env) +DEF_HELPER_1(sin_FP0, void, env) +DEF_HELPER_1(tanh_FP0, void, env) +DEF_HELPER_1(tan_FP0, void, env) +DEF_HELPER_1(exp_FP0, void, env) +DEF_HELPER_1(exp2_FP0, void, env) +DEF_HELPER_1(exp10_FP0, void, env) +DEF_HELPER_1(ln_FP0, void, env) +DEF_HELPER_1(log10_FP0, void, env) +DEF_HELPER_1(cosh_FP0, void, env) +DEF_HELPER_1(acos_FP0, void, env) +DEF_HELPER_1(cos_FP0, void, env) DEF_HELPER_3(mac_move, void, env, i32, i32) DEF_HELPER_3(macmulf, i64, env, i32, i32) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 883f4ff..7af88a2 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -4625,6 +4625,9 @@ DISAS_INSN(fpu) case 1: /* fint */ gen_helper_iround_FP0(cpu_env); break; + case 2: /* fsinh */ + gen_helper_sinh_FP0(cpu_env); + break; case 3: /* fintrz */ gen_helper_itrunc_FP0(cpu_env); break; @@ -4637,6 +4640,42 @@ DISAS_INSN(fpu) case 0x45: /* fdsqrt */ gen_helper_dsqrt_FP0(cpu_env); break; + case 0x06: /* flognp1 */ + gen_helper_lognp1_FP0(cpu_env); + break; + case 0x09: /* ftanh */ + gen_helper_tanh_FP0(cpu_env); + break; + case 0x0a: /* fatan */ + gen_helper_atan_FP0(cpu_env); + break; + case 0x0c: /* fasin */ + gen_helper_asin_FP0(cpu_env); + break; + case 0x0d: /* fatanh */ + gen_helper_atanh_FP0(cpu_env); + break; + case 0x0e: /* fsin */ + gen_helper_sin_FP0(cpu_env); + break; + case 0x0f: /* ftan */ + gen_helper_tan_FP0(cpu_env); + break; + case 0x10: /* fetox */ + gen_helper_exp_FP0(cpu_env); + break; + case 0x11: /* ftwotox */ + gen_helper_exp2_FP0(cpu_env); + break; + case 0x12: /* ftentox */ + gen_helper_exp10_FP0(cpu_env); + break; + case 0x14: /* flogn */ + gen_helper_ln_FP0(cpu_env); + break; + case 0x15: /* flog10 */ + gen_helper_log10_FP0(cpu_env); + break; case 0x18: /* fabs */ gen_helper_abs_FP0(cpu_env); break; @@ -4646,6 +4685,9 @@ DISAS_INSN(fpu) case 0x5c: /* fdabs */ gen_helper_dabs_FP0(cpu_env); break; + case 0x19: /* fcosh */ + gen_helper_cosh_FP0(cpu_env); + break; case 0x1a: /* fneg */ gen_helper_neg_FP0(cpu_env); break; @@ -4655,6 +4697,12 @@ DISAS_INSN(fpu) case 0x5e: /* fdneg */ gen_helper_dneg_FP0(cpu_env); break; + case 0x1c: /* facos */ + gen_helper_acos_FP0(cpu_env); + break; + case 0x1d: /* fcos */ + gen_helper_cos_FP0(cpu_env); + break; case 0x1e: /* fgetexp */ gen_helper_getexp_FP0(cpu_env); break;