From patchwork Mon Jan 30 18:16:22 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 721666 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3vBybb1Bxlz9ssP for ; Tue, 31 Jan 2017 05:29:31 +1100 (AEDT) Received: from localhost ([::1]:34388 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cYGhk-00059u-Fy for incoming@patchwork.ozlabs.org; Mon, 30 Jan 2017 13:29:28 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51107) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cYGVw-0002tx-Pl for qemu-devel@nongnu.org; Mon, 30 Jan 2017 13:17:17 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cYGVs-00028f-OV for qemu-devel@nongnu.org; Mon, 30 Jan 2017 13:17:16 -0500 Received: from mout.kundenserver.de ([212.227.17.13]:61326) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cYGVs-00027Q-CT for qemu-devel@nongnu.org; Mon, 30 Jan 2017 13:17:12 -0500 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue103 [212.227.15.183]) with ESMTPSA (Nemesis) id 0Lgf13-1cAoGb162f-00o1kJ; Mon, 30 Jan 2017 19:16:40 +0100 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Mon, 30 Jan 2017 19:16:22 +0100 Message-Id: <20170130181634.13934-5-laurent@vivier.eu> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170130181634.13934-1-laurent@vivier.eu> References: <20170130181634.13934-1-laurent@vivier.eu> X-Provags-ID: V03:K0:RerCx2ziQHeZ6H6t/pibmNPYarZQY+SO3eREe3fi1IEjlCfc1vL VhFHCXWlZVc2GD30pRJq7hFB3ihMgfubllYg82cyRbbIzCgypOjB/VVV33BpYRH7lbDhZ9c 3kRabKqb+lBptNCrXuUaCUkA+Ol3B6rh5Aln24+VfIILo8Q8SdPQH5Wf/jtsPafe9V7wqSK tU1ycmLLN0Ty36fU1vQVg== X-UI-Out-Filterresults: notjunk:1; V01:K0:J7rxD23ARlw=:CEnPW/PUYY12/LCV1oCSVY DVjHGwn+P+8LK9ypcqEnX9AL16WaMM9v+lEScaV2OFBGPVMSkUAgc4Q9H19mGNd2/t4BREBf0 /j1ZXvLrlEV1x0VzCip/D6f3zYXvNXJ6LVRFMiNZHvF+ZYW1m1wvVVTM/bh4+Szm6TgHDj85t x4TfGbTZmfuOz6x7qgKQ0aixAO9HH+G4o4SncGTqAW+PFBf7ZKNeKRGqo2SPOXzqdSwmlbxbF V18al8HuE5OkGG22ms7kgXed5CAjQ9YNoxvZinKVJfVnvGju/S020bOmSW/OrGIw1why88z4Q DJkfPSYJgdp0CE00FiCM1sbuy5HpLNgQ3xEyXUOduQMrB9E9si1nh8iQv/fLhN8ROxdm8ZEvj xD+uDrdteq7cdHIg+cQI+nOSpwiGOzHEbaaYCJBjb7K7+wzU+yxy728NFI1mST0JWYphrNu1M cXo8ZH03jv8fsfjgtkhlhmbGXEu0V5eVlN/B3b5FpmvbGAKcd4HyUfYv0JgGzZMAutTMkErIu EP9gvnhLyTQsvjOB8NV+cIGFQ/ITpl5g6y1otB82cTHmiv6rJlFzo2aMXI8qZdvhnxwrqnROO 69wFvQRcT83w+25prKguwy8dUO3K2hiO/ysv/x30D3DxeJ7iDhiDzUGf0A2lo5rnN+hSWI+MB IkYPIHHZIazhnmvU0rtwlkyyEYtNQvgRDLib1D6JQaMpBPQsp4wP3vNwO/JbbIeWPe6I= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 212.227.17.13 Subject: [Qemu-devel] [PATCH v2 04/16] target-m68k: define ext_opsize X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Laurent Vivier --- target/m68k/translate.c | 43 ++++++++++++++++++++++++------------------- 1 file changed, 24 insertions(+), 19 deletions(-) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 9f60fbc..d9ba735 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -669,6 +669,21 @@ static inline int insn_opsize(int insn) } } +static inline int ext_opsize(int ext, int pos) +{ + switch ((ext >> pos) & 7) { + case 0: return OS_LONG; + case 1: return OS_SINGLE; + case 2: return OS_EXTENDED; + case 3: return OS_PACKED; + case 4: return OS_WORD; + case 5: return OS_DOUBLE; + case 6: return OS_BYTE; + default: + g_assert_not_reached(); + } +} + /* Assign value to a register. If the width is less than the register width only the low part of the register is set. */ static void gen_partset_reg(int opsize, TCGv reg, TCGv val) @@ -4101,20 +4116,19 @@ DISAS_INSN(fpu) tmp32 = tcg_temp_new_i32(); /* fmove */ /* ??? TODO: Proper behavior on overflow. */ - switch ((ext >> 10) & 7) { - case 0: - opsize = OS_LONG; + + opsize = ext_opsize(ext, 10); + switch (opsize) { + case OS_LONG: gen_helper_f64_to_i32(tmp32, cpu_env, src); break; - case 1: - opsize = OS_SINGLE; + case OS_SINGLE: gen_helper_f64_to_f32(tmp32, cpu_env, src); break; - case 4: - opsize = OS_WORD; + case OS_WORD: gen_helper_f64_to_i32(tmp32, cpu_env, src); break; - case 5: /* OS_DOUBLE */ + case OS_DOUBLE: tcg_gen_mov_i32(tmp32, AREG(insn, 0)); switch ((insn >> 3) & 7) { case 2: @@ -4143,8 +4157,7 @@ DISAS_INSN(fpu) } tcg_temp_free_i32(tmp32); return; - case 6: - opsize = OS_BYTE; + case OS_BYTE: gen_helper_f64_to_i32(tmp32, cpu_env, src); break; default: @@ -4217,15 +4230,7 @@ DISAS_INSN(fpu) } if (ext & (1 << 14)) { /* Source effective address. */ - switch ((ext >> 10) & 7) { - case 0: opsize = OS_LONG; break; - case 1: opsize = OS_SINGLE; break; - case 4: opsize = OS_WORD; break; - case 5: opsize = OS_DOUBLE; break; - case 6: opsize = OS_BYTE; break; - default: - goto undef; - } + opsize = ext_opsize(ext, 10); if (opsize == OS_DOUBLE) { tmp32 = tcg_temp_new_i32(); tcg_gen_mov_i32(tmp32, AREG(insn, 0));