From patchwork Thu Apr 16 18:00:53 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Williamson X-Patchwork-Id: 461831 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id A631C14028F for ; Fri, 17 Apr 2015 04:47:39 +1000 (AEST) Received: from localhost ([::1]:38230 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Yiop5-0003WG-RO for incoming@patchwork.ozlabs.org; Thu, 16 Apr 2015 14:47:35 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60465) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Yioor-0003FS-5i for qemu-devel@nongnu.org; Thu, 16 Apr 2015 14:47:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Yiooo-0006Ly-0Y for qemu-devel@nongnu.org; Thu, 16 Apr 2015 14:47:21 -0400 Received: from mx1.redhat.com ([209.132.183.28]:46929) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Yioon-0006Lu-OC for qemu-devel@nongnu.org; Thu, 16 Apr 2015 14:47:17 -0400 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id t3GIlGkP011296 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL) for ; Thu, 16 Apr 2015 14:47:17 -0400 Received: from gimli.home (ovpn-113-195.phx2.redhat.com [10.3.113.195]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id t3GI0rJR026010; Thu, 16 Apr 2015 14:00:53 -0400 From: Alex Williamson To: alex.williamson@redhat.com Date: Thu, 16 Apr 2015 12:00:53 -0600 Message-ID: <20150416180053.3224.5870.stgit@gimli.home> In-Reply-To: <20150416175945.3224.58452.stgit@gimli.home> References: <20150416175945.3224.58452.stgit@gimli.home> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.68 on 10.5.11.23 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Cc: lersek@redhat.com, qemu-devel@nongnu.org Subject: [Qemu-devel] [PATCH for-2.4 1/2] vfio-pci: Further fix BAR size overflow X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org In an analysis by Laszlo, the resulting type of our calculation for the end of the MSI-X table, and thus the start of memory after the table, is uint32_t. We're therefore not correctly preventing the corner case overflow that we intended to fix here where a BAR >=4G could place the MSI-X table to end exactly at the 4G boundary. The MSI-X table offset is defined by the hardware spec to 32bits, so we simply use a cast rather than changing data structure types. This scenario is purely theoretically, typically the MSI-X table is located at the front of the BAR. Reported-by: Laszlo Ersek Signed-off-by: Alex Williamson --- hw/vfio/pci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index 6b80539..d387fbd 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -2394,7 +2394,7 @@ static void vfio_map_bar(VFIOPCIDevice *vdev, int nr) if (vdev->msix && vdev->msix->table_bar == nr) { uint64_t start; - start = HOST_PAGE_ALIGN(vdev->msix->table_offset + + start = HOST_PAGE_ALIGN((uint64_t)vdev->msix->table_offset + (vdev->msix->entries * PCI_MSIX_ENTRY_SIZE)); size = start < bar->region.size ? bar->region.size - start : 0;