@@ -73,7 +73,7 @@ int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type, uint8_t port)
pci_set_long(exp_cap + PCI_EXP_LNKCAP,
(port << PCI_EXP_LNKCAP_PN_SHIFT) |
- PCI_EXP_LNKCAP_ASPMS_0S |
+ PCI_EXP_LNKCAP_ASPM_L0S |
PCI_EXP_LNK_MLW_1 |
PCI_EXP_LNK_LS_25);
@@ -39,8 +39,7 @@
#define PCI_EXP_LNK_MLW_1 (1 << PCI_EXP_LNK_MLW_SHIFT)
/* PCI_EXP_LINKCAP */
-#define PCI_EXP_LNKCAP_ASPMS_SHIFT (ffs(PCI_EXP_LNKCAP_ASPMS) - 1)
-#define PCI_EXP_LNKCAP_ASPMS_0S (1 << PCI_EXP_LNKCAP_ASPMS_SHIFT)
+#define PCI_EXP_LNKCAP_ASPM_L0S 0x00000400 /* L0s supported */
#define PCI_EXP_LNKCAP_PN_SHIFT (ffs(PCI_EXP_LNKCAP_PN) - 1)
Linux actually doesn't have definitions for the individual L0s and L1 bits in Link Capabilities, but if/when it does, it will use these names, which follow the Link Control naming pattern. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> --- hw/pci/pcie.c | 2 +- include/hw/pci/pcie_regs.h | 3 +-- 2 files changed, 2 insertions(+), 3 deletions(-)