From patchwork Fri Apr 26 21:17:28 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 240049 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 604ED2C011C for ; Sat, 27 Apr 2013 07:17:54 +1000 (EST) Received: from localhost ([::1]:38112 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UVq1g-0002zl-B1 for incoming@patchwork.ozlabs.org; Fri, 26 Apr 2013 17:17:52 -0400 Received: from eggs.gnu.org ([208.118.235.92]:41712) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UVq1Q-0002yC-3c for qemu-devel@nongnu.org; Fri, 26 Apr 2013 17:17:37 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UVq1O-0003Zb-Pa for qemu-devel@nongnu.org; Fri, 26 Apr 2013 17:17:36 -0400 Received: from hall.aurel32.net ([2001:470:1f15:c4f::1]:53898) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UVq1L-0003Ya-5A; Fri, 26 Apr 2013 17:17:31 -0400 Received: from aurel32 by hall.aurel32.net with local (Exim 4.72) (envelope-from ) id 1UVq1I-0006MJ-Of; Fri, 26 Apr 2013 23:17:28 +0200 Date: Fri, 26 Apr 2013 23:17:28 +0200 From: Aurelien Jarno To: Alexander Graf Message-ID: <20130426211728.GC25132@hall.aurel32.net> References: <1367000509-8833-1-git-send-email-agraf@suse.de> <2C9C5A0C-AFA5-4F13-94A7-10270C679B6E@suse.de> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <2C9C5A0C-AFA5-4F13-94A7-10270C679B6E@suse.de> X-Mailer: Mutt 1.5.20 (2009-06-14) User-Agent: Mutt/1.5.20 (2009-06-14) X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:470:1f15:c4f::1 Cc: Blue Swirl , "qemu-ppc@nongnu.org" , "qemu-devel@nongnu.org" Subject: Re: [Qemu-devel] [PULL 00/30] ppc patch queue 2013-04-26 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org On Fri, Apr 26, 2013 at 11:03:12PM +0200, Alexander Graf wrote: > > > Am 26.04.2013 um 22:09 schrieb Blue Swirl : > > > On Fri, Apr 26, 2013 at 6:21 PM, Alexander Graf wrote: > >> Hi Blue / Aurelien, > >> > >> This is my current patch queue for ppc. Please pull. > > > > Does not build with --enable-debug: > > CC ppc-softmmu/target-ppc/translate.o > > /src/qemu/target-ppc/translate.c: In function 'gen_lfiwax': > > /src/qemu/target-ppc/translate.c:3378:5: error: incompatible type for > > argument 2 of 'gen_qemu_ld32s' > > /src/qemu/target-ppc/translate.c:2554:20: note: expected 'TCGv_i32' > > but argument is of type 'TCGv_i64' > > I pushed an updated, fixed tree. > Thanks, and sorry about that. Would it be possible to use the following patch instead? It generates slightly better code (by folding the sign extension in the load when possible). target-ppc: emulate lfiwax instruction Needed for Power ISA version 2.05 compliance. Signed-off-by: Aurelien Jarno --- target-ppc/translate.c | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 1989818..b883a57 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -2531,7 +2531,6 @@ static inline void gen_qemu_ld32u(DisasContext *ctx, TCGv arg1, TCGv arg2) } } -#if defined(TARGET_PPC64) static inline void gen_qemu_ld32s(DisasContext *ctx, TCGv arg1, TCGv arg2) { if (unlikely(ctx->le_mode)) { @@ -2541,7 +2540,6 @@ static inline void gen_qemu_ld32s(DisasContext *ctx, TCGv arg1, TCGv arg2) } else tcg_gen_qemu_ld32s(arg1, arg2, ctx->mem_idx); } -#endif static inline void gen_qemu_ld64(DisasContext *ctx, TCGv_i64 arg1, TCGv arg2) { @@ -3300,6 +3298,25 @@ GEN_LDFS(lfd, ld64, 0x12, PPC_FLOAT); /* lfs lfsu lfsux lfsx */ GEN_LDFS(lfs, ld32fs, 0x10, PPC_FLOAT); +/* lfiwax */ +static void gen_lfiwax(DisasContext *ctx) +{ + TCGv EA; + TCGv t0; + if (unlikely(!ctx->fpu_enabled)) { + gen_exception(ctx, POWERPC_EXCP_FPU); + return; + } + gen_set_access_type(ctx, ACCESS_FLOAT); + EA = tcg_temp_new(); + t0 = tcg_temp_new(); + gen_addr_reg_index(ctx, EA); + gen_qemu_ld32s(ctx, t0, EA); + tcg_gen_ext_tl_i64(cpu_fpr[rD(ctx->opcode)], t0); + tcg_temp_free(EA); + tcg_temp_free(t0); +} + /*** Floating-point store ***/ #define GEN_STF(name, stop, opc, type) \ static void glue(gen_, name)(DisasContext *ctx) \ @@ -9014,6 +9031,7 @@ GEN_LDXF(name, ldop, 0x17, op | 0x00, type) GEN_LDFS(lfd, ld64, 0x12, PPC_FLOAT) GEN_LDFS(lfs, ld32fs, 0x10, PPC_FLOAT) +GEN_HANDLER_E(lfiwax, 0x1f, 0x17, 0x1a, 0x00000001, PPC_NONE, PPC2_ISA205), #undef GEN_STF #undef GEN_STUF