From patchwork Tue Mar 19 18:11:24 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Williamson X-Patchwork-Id: 229216 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id C20EF2C0103 for ; Wed, 20 Mar 2013 06:50:36 +1100 (EST) Received: from localhost ([::1]:45582 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UI2YN-0000vt-34 for incoming@patchwork.ozlabs.org; Tue, 19 Mar 2013 15:50:35 -0400 Received: from eggs.gnu.org ([208.118.235.92]:35531) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UI2Y6-0000vj-UR for qemu-devel@nongnu.org; Tue, 19 Mar 2013 15:50:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UI10Q-00073r-DO for qemu-devel@nongnu.org; Tue, 19 Mar 2013 14:11:32 -0400 Received: from mx1.redhat.com ([209.132.183.28]:22269) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UI10P-00073Q-Pa for qemu-devel@nongnu.org; Tue, 19 Mar 2013 14:11:26 -0400 Received: from int-mx11.intmail.prod.int.phx2.redhat.com (int-mx11.intmail.prod.int.phx2.redhat.com [10.5.11.24]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id r2JIBPXM023914 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Tue, 19 Mar 2013 14:11:25 -0400 Received: from bling.home (ovpn-113-45.phx2.redhat.com [10.3.113.45]) by int-mx11.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id r2JIBObW014781; Tue, 19 Mar 2013 14:11:24 -0400 To: mst@redhat.com From: Alex Williamson Date: Tue, 19 Mar 2013 12:11:24 -0600 Message-ID: <20130319181050.11354.59357.stgit@bling.home> User-Agent: StGit/0.16 MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.68 on 10.5.11.24 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Cc: qemu-devel@nongnu.org Subject: [Qemu-devel] [PATCH] pcie: Add endpoint capability initialization wrapper X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Fix the awkward API of mangling the caller specified PCIe type and just provide an interface to initialize an endpoint device. This will pick either a regular endpoint or integrated endpoint based on the bus and return pcie_cap_init to doing exactly what is asked. Signed-off-by: Alex Williamson --- hw/pci/pcie.c | 29 ++++++++++++++++------------- hw/pci/pcie.h | 1 + hw/usb/hcd-xhci.c | 2 +- 3 files changed, 18 insertions(+), 14 deletions(-) diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c index bcfbae4..62bd0b8 100644 --- a/hw/pci/pcie.c +++ b/hw/pci/pcie.c @@ -48,19 +48,6 @@ int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type, uint8_t port) assert(pci_is_express(dev)); - /* - * Mangle type to convert Endpoints to Root Complex Integrated Endpoints. - * Windows will report Code 10 (device cannot start) for regular Endpoints - * on the Root Complex. - */ - if (pci_bus_is_express(dev->bus) && pci_bus_is_root(dev->bus)) { - switch (type) { - case PCI_EXP_TYPE_ENDPOINT: - type = PCI_EXP_TYPE_RC_END; - break; - } - } - pos = pci_add_capability(dev, PCI_CAP_ID_EXP, offset, PCI_EXP_VER2_SIZEOF); if (pos < 0) { @@ -100,6 +87,22 @@ int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type, uint8_t port) return pos; } +int pcie_endpoint_cap_init(PCIDevice *dev, uint8_t offset) +{ + uint8_t type = PCI_EXP_TYPE_ENDPOINT; + + /* + * Windows guests will report Code 10, device cannot start, if + * a regular Endpoint type is exposed on a root complex. These + * should instead be Root Complex Integrated Endpoints. + */ + if (pci_bus_is_express(dev->bus) && pci_bus_is_root(dev->bus)) { + type = PCI_EXP_TYPE_RC_END; + } + + return pcie_cap_init(dev, offset, type, 0); +} + void pcie_cap_exit(PCIDevice *dev) { pci_del_capability(dev, PCI_CAP_ID_EXP, PCI_EXP_VER2_SIZEOF); diff --git a/hw/pci/pcie.h b/hw/pci/pcie.h index 31604e2..c010007 100644 --- a/hw/pci/pcie.h +++ b/hw/pci/pcie.h @@ -95,6 +95,7 @@ struct PCIExpressDevice { /* PCI express capability helper functions */ int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type, uint8_t port); +int pcie_endpoint_cap_init(PCIDevice *dev, uint8_t offset); void pcie_cap_exit(PCIDevice *dev); uint8_t pcie_cap_get_type(const PCIDevice *dev); void pcie_cap_flags_set_vector(PCIDevice *dev, uint8_t vector); diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c index 07afdee..5aa342b 100644 --- a/hw/usb/hcd-xhci.c +++ b/hw/usb/hcd-xhci.c @@ -3332,7 +3332,7 @@ static int usb_xhci_initfn(struct PCIDevice *dev) PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64, &xhci->mem); - ret = pcie_cap_init(&xhci->pci_dev, 0xa0, PCI_EXP_TYPE_ENDPOINT, 0); + ret = pcie_endpoint_cap_init(&xhci->pci_dev, 0xa0); assert(ret >= 0); if (xhci->flags & (1 << XHCI_FLAG_USE_MSI)) {