From patchwork Wed Nov 21 05:50:45 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?6Zmz6Z+L5Lu7?= X-Patchwork-Id: 200582 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 1497C2C00D0 for ; Wed, 21 Nov 2012 16:51:04 +1100 (EST) Received: from localhost ([::1]:54495 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Tb3DC-0007bg-20 for incoming@patchwork.ozlabs.org; Wed, 21 Nov 2012 00:51:02 -0500 Received: from eggs.gnu.org ([208.118.235.92]:39082) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Tb3D4-0007b0-UB for qemu-devel@nongnu.org; Wed, 21 Nov 2012 00:50:55 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Tb3D2-0000UC-GY for qemu-devel@nongnu.org; Wed, 21 Nov 2012 00:50:54 -0500 Received: from csmailer.cs.nctu.edu.tw ([140.113.235.130]:20348) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Tb3D1-0000Tm-Vs for qemu-devel@nongnu.org; Wed, 21 Nov 2012 00:50:52 -0500 Received: from csmailer.cs.nctu.edu.tw (localhost [127.0.0.1]) by csmailer.cs.nctu.edu.tw (Postfix) with ESMTP id 9651EE1; Wed, 21 Nov 2012 13:50:47 +0800 (CST) DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=cs.nctu.edu.tw; h=date :from:to:cc:subject:message-id:mime-version:content-type; s= rsa1024; bh=D8LnB3wAZUC+t40NYup6huGpsPU=; b=XRluhNUh+pomdB6Dsy2+ 2KwxEsGlFNwYj9+5XJ08X7RlKudqWtXfszu1S9evv/TroP1Kh+2YpYv5wpbJho6a WXQuhSabS4dxTsnCgNG8yt/3uIIwZdV0R85tzwZjLY2iVWuWKunW6fCv45yO1Yhk DGjg/lZcJyhkxBbPSMusNGM= Received: from alumni.cs.nctu.edu.tw (alumni.cs.nctu.edu.tw [140.113.235.116]) by csmailer.cs.nctu.edu.tw (Postfix) with ESMTP id 7D74BE0; Wed, 21 Nov 2012 13:50:47 +0800 (CST) Received: (from chenwj@localhost) by alumni.cs.nctu.edu.tw (8.14.5/8.14.5/Submit) id qAL5ojW7033886; Wed, 21 Nov 2012 13:50:45 +0800 (CST) (envelope-from chenwj) Date: Wed, 21 Nov 2012 13:50:45 +0800 From: =?utf-8?B?6Zmz6Z+L5Lu7IChXZWktUmVuIENoZW4p?= To: "qemu-devel@nongnu.org" Message-ID: <20121121055045.GA33849@cs.nctu.edu.tw> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) X-detected-operating-system: by eggs.gnu.org: FreeBSD 8.x X-Received-From: 140.113.235.130 Cc: "Johnson, Eric" , Aurelien Jarno , Jia Liu Subject: [Qemu-devel] [PATCH v2] target-mips: Add comments on POOL32Axf encoding X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Current QEMU MIPS POOL32AXF encoding comes from microMIPS32 and microMIPS32 DSP. Add comment here to help reading. Signed-off-by: Chen Wei-Ren Reviewed-by: Eric Johnson --- v2: Correct commit message formatting target-mips/translate.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/target-mips/translate.c b/target-mips/translate.c index 8b438f8..e453d9e 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -10359,6 +10359,19 @@ enum { /* POOL32AXF encoding of minor opcode field extension */ +/* + * 1. MIPS Architecture for Programmers Volume II-B: + * The microMIPS32 Instruction Set (Revision 3.05) + * + * Table 6.5 POOL32Axf Encoding of Minor Opcode Extension Field + * + * 2. MIPS Architecture for Programmers VolumeIV-e: + * The MIPS DSP Application-Specific Extension + * to the microMIPS32 Architecture (Revision 2.34) + * + * Table 5.5 POOL32Axf Encoding of Minor Opcode Extension Field + */ + enum { /* bits 11..6 */ TEQ = 0x00, @@ -10371,6 +10384,8 @@ enum { MFC0 = 0x03, MTC0 = 0x0b, + /* begin of microMIPS32 DSP */ + /* bits 13..12 for 0x01 */ MFHI_ACC = 0x0, MFLO_ACC = 0x1, @@ -10387,6 +10402,8 @@ enum { MULT_ACC = 0x0, MULTU_ACC = 0x1, + /* end of microMIPS32 DSP */ + /* bits 15..12 for 0x2c */ SEB = 0x2, SEH = 0x3,