From patchwork Thu Mar 22 10:02:24 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jason Wang X-Patchwork-Id: 148212 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 8306BB6EF3 for ; Thu, 22 Mar 2012 21:20:22 +1100 (EST) Received: from localhost ([::1]:51910 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SAevY-0000h8-3l for incoming@patchwork.ozlabs.org; Thu, 22 Mar 2012 06:07:28 -0400 Received: from eggs.gnu.org ([208.118.235.92]:49059) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SAevG-0008Od-4V for qemu-devel@nongnu.org; Thu, 22 Mar 2012 06:07:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SAevD-0006LG-Ge for qemu-devel@nongnu.org; Thu, 22 Mar 2012 06:07:09 -0400 Received: from mx1.redhat.com ([209.132.183.28]:44635) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SAevD-0006IZ-9W for qemu-devel@nongnu.org; Thu, 22 Mar 2012 06:07:07 -0400 Received: from int-mx02.intmail.prod.int.phx2.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id q2MA749B027928 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Thu, 22 Mar 2012 06:07:04 -0400 Received: from amd-6168-8-1.englab.nay.redhat.com (amd-6168-8-1.englab.nay.redhat.com [10.66.104.52]) by int-mx02.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id q2MA70FM008476; Thu, 22 Mar 2012 06:07:02 -0400 To: qemu-devel@nongnu.org, aliguori@us.ibm.com, stefanha@linux.vnet.ibm.com, mst@redhat.com From: Jason Wang Date: Thu, 22 Mar 2012 18:02:24 +0800 Message-ID: <20120322100224.44393.32119.stgit@amd-6168-8-1.englab.nay.redhat.com> In-Reply-To: <20120322100141.44393.14528.stgit@amd-6168-8-1.englab.nay.redhat.com> References: <20120322100141.44393.14528.stgit@amd-6168-8-1.englab.nay.redhat.com> User-Agent: StGit/0.16-1-g60c4 MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.67 on 10.5.11.12 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 6/7] e1000: link auto-negotiation emulation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Indeed, there's nothing else except for the time spent on the negotiation needs to be emulated. This is needed for resuming windows guest from hibernation, as without a proper delay, qemu would send the packet too early ( guest even does not have a proper intr handler), which could lead windows guest hang. This patch first introduces an array of function pointers to make it possible to emulate per-register write behavior. Then traps the PHY_CTRL register write and when guest want to restart the link auto negotiation, we would down the link and mark the auto negotiation in progress in PHY_STATUS register. After time, a timer with 500 ms ( which is the minimum timeout of auto-negotation specified in 802.3 spec). The link would be up when timer expired. Test with resuming windows guest plus flood ping and linux ethtool linkstatus test. Signed-off-by: Jason Wang --- hw/e1000.c | 45 +++++++++++++++++++++++++++++++++++++++++++-- 1 files changed, 43 insertions(+), 2 deletions(-) diff --git a/hw/e1000.c b/hw/e1000.c index 4eb95be..921f0cc 100644 --- a/hw/e1000.c +++ b/hw/e1000.c @@ -125,6 +125,8 @@ typedef struct E1000State_st { uint16_t reading; uint32_t old_eecd; } eecd_state; + + QEMUTimer *autoneg_timer; } E1000State; #define defreg(x) x = (E1000_##x>>2) @@ -156,6 +158,34 @@ e1000_link_up(E1000State *s) s->phy_reg[PHY_STATUS] |= MII_SR_LINK_STATUS; } +static void +set_phy_ctrl(E1000State *s, int index, uint16_t val) +{ + if ((val & MII_CR_AUTO_NEG_EN) && (val & MII_CR_RESTART_AUTO_NEG)) { + s->nic->nc.link_down = true; + e1000_link_down(s); + s->phy_reg[PHY_STATUS] &= ~MII_SR_AUTONEG_COMPLETE; + DBGOUT(PHY, "Start link auto negotiation\n"); + qemu_mod_timer(s->autoneg_timer, qemu_get_clock_ms(vm_clock) + 500); + } +} + +static void +e1000_autoneg_timer(void *opaque) +{ + E1000State *s = opaque; + s->nic->nc.link_down = false; + e1000_link_up(s); + s->phy_reg[PHY_STATUS] |= MII_SR_AUTONEG_COMPLETE; + DBGOUT(PHY, "Auto negotiation is completed\n"); +} + +static void (*phyreg_writeops[])(E1000State *, int, uint16_t) = { + [PHY_CTRL] = set_phy_ctrl, +}; + +enum { NPHYWRITEOPS = ARRAY_SIZE(phyreg_writeops) }; + enum { PHY_R = 1, PHY_W = 2, PHY_RW = PHY_R | PHY_W }; static const char phy_regcap[0x20] = { [PHY_STATUS] = PHY_R, [M88E1000_EXT_PHY_SPEC_CTRL] = PHY_RW, @@ -244,8 +274,12 @@ set_mdic(E1000State *s, int index, uint32_t val) if (!(phy_regcap[addr] & PHY_W)) { DBGOUT(MDIC, "MDIC write reg %x unhandled\n", addr); val |= E1000_MDIC_ERROR; - } else + } else { + if (addr < NPHYWRITEOPS && phyreg_writeops[addr]) { + phyreg_writeops[addr](s, index, data); + } s->phy_reg[addr] = data; + } } s->mac_reg[MDIC] = val | E1000_MDIC_READY; @@ -926,6 +960,7 @@ static void (*macreg_writeops[])(E1000State *, int, uint32_t) = { [MTA ... MTA+127] = &mac_writereg, [VFTA ... VFTA+127] = &mac_writereg, }; + enum { NWRITEOPS = ARRAY_SIZE(macreg_writeops) }; static void @@ -1087,7 +1122,8 @@ static const uint16_t e1000_eeprom_template[64] = { }; static const uint16_t phy_reg_init[] = { - [PHY_CTRL] = 0x1140, [PHY_STATUS] = 0x796d, // link initially up + [PHY_CTRL] = 0x1140, + [PHY_STATUS] = 0x794d, /* link initially up with not completed autoneg */ [PHY_ID1] = 0x141, [PHY_ID2] = PHY_ID2_INIT, [PHY_1000T_CTRL] = 0x0e00, [M88E1000_PHY_SPEC_CTRL] = 0x360, [M88E1000_EXT_PHY_SPEC_CTRL] = 0x0d60, [PHY_AUTONEG_ADV] = 0xde1, @@ -1142,6 +1178,8 @@ pci_e1000_uninit(PCIDevice *dev) { E1000State *d = DO_UPCAST(E1000State, dev, dev); + qemu_del_timer(d->autoneg_timer); + qemu_free_timer(d->autoneg_timer); memory_region_destroy(&d->mmio); memory_region_destroy(&d->io); qemu_del_vlan_client(&d->nic->nc); @@ -1152,6 +1190,7 @@ static void e1000_reset(void *opaque) { E1000State *d = opaque; + qemu_del_timer(d->autoneg_timer); memset(d->phy_reg, 0, sizeof d->phy_reg); memmove(d->phy_reg, phy_reg_init, sizeof phy_reg_init); memset(d->mac_reg, 0, sizeof d->mac_reg); @@ -1212,6 +1251,8 @@ static int pci_e1000_init(PCIDevice *pci_dev) add_boot_device_path(d->conf.bootindex, &pci_dev->qdev, "/ethernet-phy@0"); + d->autoneg_timer = qemu_new_timer_ms(vm_clock, e1000_autoneg_timer, d); + return 0; }