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[1/7] e1000: introduce bits of PHY control register

Message ID 20120322100141.44393.14528.stgit@amd-6168-8-1.englab.nay.redhat.com
State New
Headers show

Commit Message

Jason Wang March 22, 2012, 10:01 a.m. UTC
This would be used be following patches.

Signed-off-by: Jason Wang <jasowang@redhat.com>
---
 hw/e1000_hw.h |   12 ++++++++++++
 1 files changed, 12 insertions(+), 0 deletions(-)

Comments

Michael S. Tsirkin April 25, 2012, 7:43 a.m. UTC | #1
On Thu, Mar 22, 2012 at 06:01:42PM +0800, Jason Wang wrote:
> This would be used be following patches.
> 
> Signed-off-by: Jason Wang <jasowang@redhat.com>

Applied, thanks.

> ---
>  hw/e1000_hw.h |   12 ++++++++++++
>  1 files changed, 12 insertions(+), 0 deletions(-)
> 
> diff --git a/hw/e1000_hw.h b/hw/e1000_hw.h
> index 9e29af8..c9cb79e 100644
> --- a/hw/e1000_hw.h
> +++ b/hw/e1000_hw.h
> @@ -349,6 +349,18 @@
>  #define M88E1000_PHY_VCO_REG_BIT8  0x100 /* Bits 8 & 11 are adjusted for */
>  #define M88E1000_PHY_VCO_REG_BIT11 0x800    /* improved BER performance */
>  
> +/* PHY Control Register */
> +#define MII_CR_SPEED_SELECT_MSB 0x0040 /* bits 6,13: 10=1000, 01=100, 00=10 */
> +#define MII_CR_COLL_TEST_ENABLE 0x0080 /* Collision test enable */
> +#define MII_CR_FULL_DUPLEX      0x0100 /* FDX =1, half duplex =0 */
> +#define MII_CR_RESTART_AUTO_NEG 0x0200 /* Restart auto negotiation */
> +#define MII_CR_ISOLATE          0x0400 /* Isolate PHY from MII */
> +#define MII_CR_POWER_DOWN       0x0800 /* Power down */
> +#define MII_CR_AUTO_NEG_EN      0x1000 /* Auto Neg Enable */
> +#define MII_CR_SPEED_SELECT_LSB 0x2000 /* bits 6,13: 10=1000, 01=100, 00=10 */
> +#define MII_CR_LOOPBACK         0x4000 /* 0 = normal, 1 = loopback */
> +#define MII_CR_RESET            0x8000 /* 0 = normal, 1 = PHY reset */
> +
>  /* PHY Status Register */
>  #define MII_SR_EXTENDED_CAPS     0x0001	/* Extended register capabilities */
>  #define MII_SR_JABBER_DETECT     0x0002	/* Jabber Detected */
diff mbox

Patch

diff --git a/hw/e1000_hw.h b/hw/e1000_hw.h
index 9e29af8..c9cb79e 100644
--- a/hw/e1000_hw.h
+++ b/hw/e1000_hw.h
@@ -349,6 +349,18 @@ 
 #define M88E1000_PHY_VCO_REG_BIT8  0x100 /* Bits 8 & 11 are adjusted for */
 #define M88E1000_PHY_VCO_REG_BIT11 0x800    /* improved BER performance */
 
+/* PHY Control Register */
+#define MII_CR_SPEED_SELECT_MSB 0x0040 /* bits 6,13: 10=1000, 01=100, 00=10 */
+#define MII_CR_COLL_TEST_ENABLE 0x0080 /* Collision test enable */
+#define MII_CR_FULL_DUPLEX      0x0100 /* FDX =1, half duplex =0 */
+#define MII_CR_RESTART_AUTO_NEG 0x0200 /* Restart auto negotiation */
+#define MII_CR_ISOLATE          0x0400 /* Isolate PHY from MII */
+#define MII_CR_POWER_DOWN       0x0800 /* Power down */
+#define MII_CR_AUTO_NEG_EN      0x1000 /* Auto Neg Enable */
+#define MII_CR_SPEED_SELECT_LSB 0x2000 /* bits 6,13: 10=1000, 01=100, 00=10 */
+#define MII_CR_LOOPBACK         0x4000 /* 0 = normal, 1 = loopback */
+#define MII_CR_RESET            0x8000 /* 0 = normal, 1 = PHY reset */
+
 /* PHY Status Register */
 #define MII_SR_EXTENDED_CAPS     0x0001	/* Extended register capabilities */
 #define MII_SR_JABBER_DETECT     0x0002	/* Jabber Detected */