From patchwork Wed Mar 7 00:13:59 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Williamson X-Patchwork-Id: 145116 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 128E9B6EEC for ; Wed, 7 Mar 2012 11:14:36 +1100 (EST) Received: from localhost ([::1]:54491 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S54WX-0004o5-Rw for incoming@patchwork.ozlabs.org; Tue, 06 Mar 2012 19:14:33 -0500 Received: from eggs.gnu.org ([208.118.235.92]:43024) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S54W4-0004Vj-0j for qemu-devel@nongnu.org; Tue, 06 Mar 2012 19:14:23 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S54W2-0005Ta-2h for qemu-devel@nongnu.org; Tue, 06 Mar 2012 19:14:03 -0500 Received: from mx1.redhat.com ([209.132.183.28]:11686) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S54W1-0005TQ-QW for qemu-devel@nongnu.org; Tue, 06 Mar 2012 19:14:02 -0500 Received: from int-mx12.intmail.prod.int.phx2.redhat.com (int-mx12.intmail.prod.int.phx2.redhat.com [10.5.11.25]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id q270E0hR012505 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Tue, 6 Mar 2012 19:14:00 -0500 Received: from bling.home ([10.3.113.14]) by int-mx12.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id q270DxVS009065; Tue, 6 Mar 2012 19:13:59 -0500 From: Alex Williamson To: qemu-devel@nongnu.org Date: Tue, 06 Mar 2012 17:13:59 -0700 Message-ID: <20120307001341.3079.18824.stgit@bling.home> In-Reply-To: <20120307000340.3079.87515.stgit@bling.home> References: <20120307000340.3079.87515.stgit@bling.home> User-Agent: StGIT/0.14.3 MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.68 on 10.5.11.25 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.132.183.28 Cc: alex.williamson@redhat.com, ddutile@redhat.com, gleb@redhat.com, mst@redhat.com Subject: [Qemu-devel] [PATCH 1/6] acpi_piix4: Disallow write to up/down PCI hotplug registers X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org These are never written. Signed-off-by: Alex Williamson --- hw/acpi_piix4.c | 45 +++++++++++++-------------------------------- 1 files changed, 13 insertions(+), 32 deletions(-) diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index 30d37f9..5960b7f 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -41,7 +41,8 @@ #define GPE_BASE 0xafe0 #define PROC_BASE 0xaf00 #define GPE_LEN 4 -#define PCI_BASE 0xae00 +#define PCI_UP_BASE 0xae00 +#define PCI_DOWN_BASE 0xae04 #define PCI_EJ_BASE 0xae08 #define PCI_RMV_BASE 0xae0c @@ -472,40 +473,22 @@ static void gpe_writeb(void *opaque, uint32_t addr, uint32_t val) PIIX4_DPRINTF("gpe write %x <== %d\n", addr, val); } -static uint32_t pcihotplug_read(void *opaque, uint32_t addr) +static uint32_t pci_updown_read(void *opaque, uint32_t addr) { - uint32_t val = 0; - struct pci_status *g = opaque; - switch (addr) { - case PCI_BASE: - val = g->up; - break; - case PCI_BASE + 4: - val = g->down; - break; - default: - break; + PIIX4PMState *s = opaque; + uint32_t val; + + if (addr == PCI_UP_BASE) { + val = s->pci0_status.up; + } else { + val = s->pci0_status.down; } - PIIX4_DPRINTF("pcihotplug read %x == %x\n", addr, val); + PIIX4_DPRINTF("pci %s read %x\n", + (addr == PCI_UP_BASE) ? "up" : "down", val); return val; } -static void pcihotplug_write(void *opaque, uint32_t addr, uint32_t val) -{ - struct pci_status *g = opaque; - switch (addr) { - case PCI_BASE: - g->up = val; - break; - case PCI_BASE + 4: - g->down = val; - break; - } - - PIIX4_DPRINTF("pcihotplug write %x <== %d\n", addr, val); -} - static uint32_t pciej_read(void *opaque, uint32_t addr) { PIIX4_DPRINTF("pciej read %x\n", addr); @@ -549,7 +532,6 @@ static int piix4_device_hotplug(DeviceState *qdev, PCIDevice *dev, static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s) { - struct pci_status *pci0_status = &s->pci0_status; int i = 0, cpus = smp_cpus; while (cpus > 0) { @@ -564,8 +546,7 @@ static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s) register_ioport_write(PROC_BASE, 32, 1, gpe_writeb, s); register_ioport_read(PROC_BASE, 32, 1, gpe_readb, s); - register_ioport_write(PCI_BASE, 8, 4, pcihotplug_write, pci0_status); - register_ioport_read(PCI_BASE, 8, 4, pcihotplug_read, pci0_status); + register_ioport_read(PCI_UP_BASE, 8, 4, pci_updown_read, s); register_ioport_write(PCI_EJ_BASE, 4, 4, pciej_write, bus); register_ioport_read(PCI_EJ_BASE, 4, 4, pciej_read, bus);