@@ -36,13 +36,15 @@ void mch_mem_addr_init(u16 bdf, void *arg)
/*
* BUILD_MAX_HIGHMEM == 0xc0000000
- * [0xc000 0000, 0xf000 0000) for MCFG
- * 4GB - 1GB, 4GB - 256MB
+ * [0xc000 0000, 0xd000 0000) for MCFG
+ * 3GB , 3GB + 256MB
+ * [0xd000 0000, 0xf000 0000) for pci memory region
+ * 3GB + 256MB, 4GB - 256MB
* [0xf000 0000, 0xfec0 0000) for DMI interface(subtractive decode)
* 4GB - 256MB, 4GB - 20MB
*/
- s = BUILD_MAX_HIGHMEM;
- e = s + 128 * 1024 * 1024 - 1 + 512 * 1024 * 1024;
+ s = Q35_HOST_BRIDGE_PCIEXBAR_ADDR + Q35_HOST_BRIDGE_PCIEXBAR_SIZE;
+ e = s + 512 * 1024 * 1024 - 1;
pci_region_init(addr->pci_bios_mem_region, s, e);
/* pci_bios_mem_addr + <some value: 128M is used here> */
@@ -8,7 +8,7 @@
#define Q35_HOST_BRIDGE_SMRAM 0x9d
#define Q35_HOST_BRIDGE_PCIEXBAR 0x60
#define Q35_HOST_BRIDGE_PCIEXBAR_SIZE (256 * 1024 * 1024)
-#define Q35_HOST_BRIDGE_PCIEXBAR_ADDR 0xe0000000
+#define Q35_HOST_BRIDGE_PCIEXBAR_ADDR BUILD_MAX_HIGHMEM
#define Q35_HOST_BRIDGE_PCIEXBAREN ((u64)1)
#define Q35_HOST_PCIE_PCI_SEGMENT 0
#define Q35_HOST_PCIE_START_BUS_NUMBER 0