diff mbox

target-arm: Handle 'smc' as an undefined instruction

Message ID 20101104222132.GB30050@os.inf.tu-dresden.de
State New
Headers show

Commit Message

Adam Lackorzynski Nov. 4, 2010, 10:21 p.m. UTC
Refine check on bkpt so that smc and undefined instruction encodings are
handled as an undefined instruction and trap.

Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de>
---
 target-arm/translate.c |    9 ++++++++-
 1 files changed, 8 insertions(+), 1 deletions(-)

Comments

Peter Maydell Nov. 14, 2010, 5:10 p.m. UTC | #1
On 4 November 2010 22:21, Adam Lackorzynski <adam@os.inf.tu-dresden.de> wrote:
>
> Refine check on bkpt so that smc and undefined instruction encodings are
> handled as an undefined instruction and trap.
>
> Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de>

This patch looks good to me. I note that there's actually an implementation
of SMC and at least some of the TrustZone extension in the qemu-meego
tree. However, for the moment this patch is correct: SMC should UNDEF on
cores without TrustZone (which is what current qemu effectively is).

Acked-by: Peter Maydell <peter.maydell@linaro.org>

-- PMM
diff mbox

Patch

diff --git a/target-arm/translate.c b/target-arm/translate.c
index 99464ab..c7283e3 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -6346,7 +6346,14 @@  static void disas_arm_insn(CPUState * env, DisasContext *s)
             dead_tmp(tmp2);
             store_reg(s, rd, tmp);
             break;
-        case 7: /* bkpt */
+        case 7:
+            /* SMC instruction (op1 == 3)
+               and undefined instructions (op1 == 0 || op1 == 2)
+               will trap */
+            if (op1 != 1) {
+                goto illegal_op;
+            }
+            /* bkpt */
             gen_set_condexec(s);
             gen_set_pc_im(s->pc - 4);
             gen_exception(EXCP_BKPT);