From patchwork Thu Sep 2 23:11:24 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Lackorzynski X-Patchwork-Id: 63579 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id DAB0EB7197 for ; Fri, 3 Sep 2010 09:12:27 +1000 (EST) Received: from localhost ([127.0.0.1]:55255 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OrIxD-0003wA-Iq for incoming@patchwork.ozlabs.org; Thu, 02 Sep 2010 19:12:23 -0400 Received: from [140.186.70.92] (port=53771 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OrIwL-0003ub-OM for qemu-devel@nongnu.org; Thu, 02 Sep 2010 19:11:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OrIwK-0007av-Dk for qemu-devel@nongnu.org; Thu, 02 Sep 2010 19:11:29 -0400 Received: from os.inf.tu-dresden.de ([141.76.48.99]:35749) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OrIwK-0007aT-83 for qemu-devel@nongnu.org; Thu, 02 Sep 2010 19:11:28 -0400 Received: from erwin.inf.tu-dresden.de ([141.76.48.80] helo=os.inf.tu-dresden.de) by os.inf.tu-dresden.de with esmtps (TLSv1:AES128-SHA:128) (Exim 4.72) id 1OrIwI-000216-79; Fri, 03 Sep 2010 01:11:26 +0200 Date: Fri, 3 Sep 2010 01:11:24 +0200 From: Adam Lackorzynski To: Peter Maydell Subject: Re: [Qemu-devel] [PATCH] target-arm: Handle 'smc' as an undefined instruction Message-ID: <20100902231124.GE23301@os.inf.tu-dresden.de> References: <20100902214050.GD23301@os.inf.tu-dresden.de> <20100902221423.GB9117@archaic.org.uk> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20100902221423.GB9117@archaic.org.uk> User-Agent: Mutt/1.5.20 (2009-06-14) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) Cc: qemu-devel@nongnu.org X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org On Thu Sep 02, 2010 at 23:14:23 +0100, Peter Maydell wrote: > On Thu, Sep 02, 2010 at 11:40:50PM +0200, Adam Lackorzynski wrote: > > + case 7: > > + /* SMC? */ > > + if ((insn & 0xfffffff0) == 0xe1600070) { > > + goto illegal_op; > > + } > > + /* bkpt */ > > This doesn't look right to me. SMC in the ARM encoding is a standard > conditionalised instruction, so you shouldn't be mandating that the > cond field is 0xe. True. > I think the correct way to distinguish BKPT from SMC is to look at > bits [22..21] of the instruction: 01 for BKPT, 11 for SMC and > other combinations are UNDEFINED. This is in 'op1' at this point > in the code... target-arm: Handle 'smc' as an undefined instruction Refine check on bkpt so that smc is handled as an undefined instruction. Signed-off-by: Adam Lackorzynski --- target-arm/translate.c | 6 +++++- 1 files changed, 5 insertions(+), 1 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index 6fcdd7e..fac4f5d 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -6346,7 +6346,11 @@ static void disas_arm_insn(CPUState * env, DisasContext *s) dead_tmp(tmp2); store_reg(s, rd, tmp); break; - case 7: /* bkpt */ + case 7: + if (op1 != 1) { + goto illegal_op; + } + /* bkpt */ gen_set_condexec(s); gen_set_pc_im(s->pc - 4); gen_exception(EXCP_BKPT);