@@ -40,7 +40,7 @@ static inline void cpu_register_physical_memory(target_phys_addr_t start_addr,
}
ram_addr_t cpu_get_physical_page_desc(target_phys_addr_t addr);
-ram_addr_t qemu_ram_alloc(ram_addr_t);
+ram_addr_t qemu_ram_alloc(DeviceState *dev, const char *name, ram_addr_t size);
void qemu_ram_free(ram_addr_t addr);
/* This should only be used for ram local to a device. */
void *qemu_get_ram_ptr(ram_addr_t addr);
@@ -2776,7 +2776,7 @@ static ram_addr_t find_ram_offset(ram_addr_t size)
return last;
}
-ram_addr_t qemu_ram_alloc(ram_addr_t size)
+ram_addr_t qemu_ram_alloc(DeviceState *dev, const char *name, ram_addr_t size)
{
RAMBlock *new_block;
@@ -54,11 +54,11 @@ static void an5206_init(ram_addr_t ram_size,
/* DRAM at address zero */
cpu_register_physical_memory(0, ram_size,
- qemu_ram_alloc(ram_size) | IO_MEM_RAM);
+ qemu_ram_alloc(NULL, "an5206.ram", ram_size) | IO_MEM_RAM);
/* Internal SRAM. */
cpu_register_physical_memory(AN5206_RAMBAR_ADDR, 512,
- qemu_ram_alloc(512) | IO_MEM_RAM);
+ qemu_ram_alloc(NULL, "an5206.sram", 512) | IO_MEM_RAM);
mcf5206_init(AN5206_MBAR_ADDR, env);
@@ -200,9 +200,11 @@ qemu_irq *armv7m_init(int flash_size, int sram_size,
/* Flash programming is done via the SCU, so pretend it is ROM. */
cpu_register_physical_memory(0, flash_size,
- qemu_ram_alloc(flash_size) | IO_MEM_ROM);
+ qemu_ram_alloc(NULL, "armv7m.flash",
+ flash_size) | IO_MEM_ROM);
cpu_register_physical_memory(0x20000000, sram_size,
- qemu_ram_alloc(sram_size) | IO_MEM_RAM);
+ qemu_ram_alloc(NULL, "armv7m.sram",
+ sram_size) | IO_MEM_RAM);
armv7m_bitband_init();
nvic = qdev_create(NULL, "armv7m_nvic");
@@ -236,7 +238,8 @@ qemu_irq *armv7m_init(int flash_size, int sram_size,
space. This stops qemu complaining about executing code outside RAM
when returning from an exception. */
cpu_register_physical_memory(0xfffff000, 0x1000,
- qemu_ram_alloc(0x1000) | IO_MEM_RAM);
+ qemu_ram_alloc(NULL, "armv7m.hack",
+ 0x1000) | IO_MEM_RAM);
qemu_register_reset(armv7m_reset, env);
return pic;
@@ -268,12 +268,12 @@ void axisdev88_init (ram_addr_t ram_size,
env = cpu_init(cpu_model);
/* allocate RAM */
- phys_ram = qemu_ram_alloc(ram_size);
+ phys_ram = qemu_ram_alloc(NULL, "axisdev88.ram", ram_size);
cpu_register_physical_memory(0x40000000, ram_size, phys_ram | IO_MEM_RAM);
/* The ETRAX-FS has 128Kb on chip ram, the docs refer to it as the
internal memory. */
- phys_intmem = qemu_ram_alloc(INTMEM_SIZE);
+ phys_intmem = qemu_ram_alloc(NULL, "axisdev88.chipram", INTMEM_SIZE);
cpu_register_physical_memory(0x38000000, INTMEM_SIZE,
phys_intmem | IO_MEM_RAM);
@@ -39,7 +39,7 @@ static void dummy_m68k_init(ram_addr_t ram_size,
/* RAM at address zero */
cpu_register_physical_memory(0, ram_size,
- qemu_ram_alloc(ram_size) | IO_MEM_RAM);
+ qemu_ram_alloc(NULL, "dummy_m68k.ram", ram_size) | IO_MEM_RAM);
/* Load kernel. */
if (kernel_filename) {
@@ -68,17 +68,17 @@ void bareetraxfs_init (ram_addr_t ram_size,
env = cpu_init(cpu_model);
/* allocate RAM */
- phys_ram = qemu_ram_alloc(ram_size);
+ phys_ram = qemu_ram_alloc(NULL, "etraxfs.ram", ram_size);
cpu_register_physical_memory(0x40000000, ram_size, phys_ram | IO_MEM_RAM);
/* The ETRAX-FS has 128Kb on chip ram, the docs refer to it as the
internal memory. */
- phys_intmem = qemu_ram_alloc(INTMEM_SIZE);
+ phys_intmem = qemu_ram_alloc(NULL, "etraxfs.chipram", INTMEM_SIZE);
cpu_register_physical_memory(0x38000000, INTMEM_SIZE,
phys_intmem | IO_MEM_RAM);
- phys_flash = qemu_ram_alloc(FLASH_SIZE);
+ phys_flash = qemu_ram_alloc(NULL, "etraxfs.flash", FLASH_SIZE);
dinfo = drive_get(IF_PFLASH, 0, 0);
pflash_cfi02_register(0x0, phys_flash,
dinfo ? dinfo->bdrv : NULL, (64 * 1024),
@@ -593,7 +593,7 @@ int g364fb_mm_init(target_phys_addr_t vram_base,
s = qemu_mallocz(sizeof(G364State));
s->vram_size = 8 * 1024 * 1024;
- s->vram_offset = qemu_ram_alloc(s->vram_size);
+ s->vram_offset = qemu_ram_alloc(NULL, "g364fb.vram", s->vram_size);
s->vram = qemu_get_ram_ptr(s->vram_offset);
s->irq = irq;
@@ -67,7 +67,8 @@ static void connex_init(ram_addr_t ram_size,
#else
be = 0;
#endif
- if (!pflash_cfi01_register(0x00000000, qemu_ram_alloc(connex_rom),
+ if (!pflash_cfi01_register(0x00000000, qemu_ram_alloc(NULL, "connext.rom",
+ connex_rom),
dinfo->bdrv, sector_len, connex_rom / sector_len,
2, 0, 0, 0, 0, be)) {
fprintf(stderr, "qemu: Error registering flash memory.\n");
@@ -105,7 +106,8 @@ static void verdex_init(ram_addr_t ram_size,
#else
be = 0;
#endif
- if (!pflash_cfi01_register(0x00000000, qemu_ram_alloc(verdex_rom),
+ if (!pflash_cfi01_register(0x00000000, qemu_ram_alloc(NULL, "verdex.rom",
+ verdex_rom),
dinfo->bdrv, sector_len, verdex_rom / sector_len,
2, 0, 0, 0, 0, be)) {
fprintf(stderr, "qemu: Error registering flash memory.\n");
@@ -253,7 +253,7 @@ static int integratorcm_init(SysBusDevice *dev)
}
memcpy(integrator_spd + 73, "QEMU-MEMORY", 11);
s->cm_init = 0x00000112;
- s->flash_offset = qemu_ram_alloc(0x100000);
+ s->flash_offset = qemu_ram_alloc(NULL, "integrator.flash", 0x100000);
iomemtype = cpu_register_io_memory(integratorcm_readfn,
integratorcm_writefn, s);
@@ -467,7 +467,7 @@ static void integratorcp_init(ram_addr_t ram_size,
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
}
- ram_offset = qemu_ram_alloc(ram_size);
+ ram_offset = qemu_ram_alloc(NULL, "integrator.ram", ram_size);
/* ??? On a real system the first 1Mb is mapped as SSRAM or boot flash. */
/* ??? RAM should repeat to fill physical memory space. */
/* SDRAM at address zero*/
@@ -87,7 +87,8 @@ static void mainstone_common_init(ram_addr_t ram_size,
/* Setup CPU & memory */
cpu = pxa270_init(mainstone_binfo.ram_size, cpu_model);
cpu_register_physical_memory(0, MAINSTONE_ROM,
- qemu_ram_alloc(MAINSTONE_ROM) | IO_MEM_ROM);
+ qemu_ram_alloc(NULL, "mainstone.rom",
+ MAINSTONE_ROM) | IO_MEM_ROM);
#ifdef TARGET_WORDS_BIGENDIAN
be = 1;
@@ -104,7 +105,8 @@ static void mainstone_common_init(ram_addr_t ram_size,
}
if (!pflash_cfi01_register(mainstone_flash_base[i],
- qemu_ram_alloc(MAINSTONE_FLASH),
+ qemu_ram_alloc(NULL, "mainstone.flash",
+ MAINSTONE_FLASH),
dinfo->bdrv, sector_len,
MAINSTONE_FLASH / sector_len, 4, 0, 0, 0, 0,
be)) {
@@ -220,11 +220,11 @@ static void mcf5208evb_init(ram_addr_t ram_size,
/* DRAM at 0x40000000 */
cpu_register_physical_memory(0x40000000, ram_size,
- qemu_ram_alloc(ram_size) | IO_MEM_RAM);
+ qemu_ram_alloc(NULL, "mcf5208.ram", ram_size) | IO_MEM_RAM);
/* Internal SRAM. */
cpu_register_physical_memory(0x80000000, 16384,
- qemu_ram_alloc(16384) | IO_MEM_RAM);
+ qemu_ram_alloc(NULL, "mcf5208.sram", 16384) | IO_MEM_RAM);
/* Internal peripherals. */
pic = mcf_intc_init(0xfc048000, env);
@@ -160,10 +160,10 @@ void mips_jazz_init (ram_addr_t ram_size,
qemu_register_reset(main_cpu_reset, env);
/* allocate RAM */
- ram_offset = qemu_ram_alloc(ram_size);
+ ram_offset = qemu_ram_alloc(NULL, "mips_jazz.ram", ram_size);
cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
- bios_offset = qemu_ram_alloc(MAGNUM_BIOS_SIZE);
+ bios_offset = qemu_ram_alloc(NULL, "mips_jazz.bios", MAGNUM_BIOS_SIZE);
cpu_register_physical_memory(0x1fc00000LL,
MAGNUM_BIOS_SIZE, bios_offset | IO_MEM_ROM);
cpu_register_physical_memory(0xfff00000LL,
@@ -833,8 +833,8 @@ void mips_malta_init (ram_addr_t ram_size,
((unsigned int)ram_size / (1 << 20)));
exit(1);
}
- ram_offset = qemu_ram_alloc(ram_size);
- bios_offset = qemu_ram_alloc(BIOS_SIZE);
+ ram_offset = qemu_ram_alloc(NULL, "mips_malta.ram", ram_size);
+ bios_offset = qemu_ram_alloc(NULL, "mips_malta.bios", BIOS_SIZE);
cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
@@ -144,8 +144,8 @@ mips_mipssim_init (ram_addr_t ram_size,
qemu_register_reset(main_cpu_reset, reset_info);
/* Allocate RAM. */
- ram_offset = qemu_ram_alloc(ram_size);
- bios_offset = qemu_ram_alloc(BIOS_SIZE);
+ ram_offset = qemu_ram_alloc(NULL, "mips_mipssim.ram", ram_size);
+ bios_offset = qemu_ram_alloc(NULL, "mips_mipssim.bios", BIOS_SIZE);
cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
@@ -198,7 +198,7 @@ void mips_r4k_init (ram_addr_t ram_size,
((unsigned int)ram_size / (1 << 20)));
exit(1);
}
- ram_offset = qemu_ram_alloc(ram_size);
+ ram_offset = qemu_ram_alloc(NULL, "mips_r4k.ram", ram_size);
cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
@@ -226,14 +226,14 @@ void mips_r4k_init (ram_addr_t ram_size,
be = 0;
#endif
if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
- bios_offset = qemu_ram_alloc(BIOS_SIZE);
+ bios_offset = qemu_ram_alloc(NULL, "mips_r4k.bios", BIOS_SIZE);
cpu_register_physical_memory(0x1fc00000, BIOS_SIZE,
bios_offset | IO_MEM_ROM);
load_image_targphys(filename, 0x1fc00000, BIOS_SIZE);
} else if ((dinfo = drive_get(IF_PFLASH, 0, 0)) != NULL) {
uint32_t mips_rom = 0x00400000;
- bios_offset = qemu_ram_alloc(mips_rom);
+ bios_offset = qemu_ram_alloc(NULL, "mips_r4k.bios", mips_rom);
if (!pflash_cfi01_register(0x1fc00000, bios_offset,
dinfo->bdrv, sector_len,
mips_rom / sector_len,
@@ -1508,9 +1508,10 @@ static void musicpal_init(ram_addr_t ram_size,
/* For now we use a fixed - the original - RAM size */
cpu_register_physical_memory(0, MP_RAM_DEFAULT_SIZE,
- qemu_ram_alloc(MP_RAM_DEFAULT_SIZE));
+ qemu_ram_alloc(NULL, "musicpal.ram",
+ MP_RAM_DEFAULT_SIZE));
- sram_off = qemu_ram_alloc(MP_SRAM_SIZE);
+ sram_off = qemu_ram_alloc(NULL, "musicpal.sram", MP_SRAM_SIZE);
cpu_register_physical_memory(MP_SRAM_BASE, MP_SRAM_SIZE, sram_off);
dev = sysbus_create_simple("mv88w8618_pic", MP_PIC_BASE,
@@ -1557,14 +1558,16 @@ static void musicpal_init(ram_addr_t ram_size,
* image is smaller than 32 MB.
*/
#ifdef TARGET_WORDS_BIGENDIAN
- pflash_cfi02_register(0-MP_FLASH_SIZE_MAX, qemu_ram_alloc(flash_size),
+ pflash_cfi02_register(0-MP_FLASH_SIZE_MAX, qemu_ram_alloc(NULL,
+ "musicpal.flash", flash_size),
dinfo->bdrv, 0x10000,
(flash_size + 0xffff) >> 16,
MP_FLASH_SIZE_MAX / flash_size,
2, 0x00BF, 0x236D, 0x0000, 0x0000,
0x5555, 0x2AAA, 1);
#else
- pflash_cfi02_register(0-MP_FLASH_SIZE_MAX, qemu_ram_alloc(flash_size),
+ pflash_cfi02_register(0-MP_FLASH_SIZE_MAX, qemu_ram_alloc(NULL,
+ "musicpal.flash", flash_size),
dinfo->bdrv, 0x10000,
(flash_size + 0xffff) >> 16,
MP_FLASH_SIZE_MAX / flash_size,
@@ -4655,9 +4655,11 @@ struct omap_mpu_state_s *omap310_mpu_init(unsigned long sdram_size,
/* Memory-mapped stuff */
cpu_register_physical_memory(OMAP_EMIFF_BASE, s->sdram_size,
- (emiff_base = qemu_ram_alloc(s->sdram_size)) | IO_MEM_RAM);
+ (emiff_base = qemu_ram_alloc(NULL, "omap1.dram",
+ s->sdram_size)) | IO_MEM_RAM);
cpu_register_physical_memory(OMAP_IMIF_BASE, s->sram_size,
- (imif_base = qemu_ram_alloc(s->sram_size)) | IO_MEM_RAM);
+ (imif_base = qemu_ram_alloc(NULL, "omap1.sram",
+ s->sram_size)) | IO_MEM_RAM);
omap_clkm_init(0xfffece00, 0xe1008000, s);
@@ -4518,9 +4518,11 @@ struct omap_mpu_state_s *omap2420_mpu_init(unsigned long sdram_size,
/* Memory-mapped stuff */
cpu_register_physical_memory(OMAP2_Q2_BASE, s->sdram_size,
- (q2_base = qemu_ram_alloc(s->sdram_size)) | IO_MEM_RAM);
+ (q2_base = qemu_ram_alloc(NULL, "omap2.dram",
+ s->sdram_size)) | IO_MEM_RAM);
cpu_register_physical_memory(OMAP2_SRAM_BASE, s->sram_size,
- (sram_base = qemu_ram_alloc(s->sram_size)) | IO_MEM_RAM);
+ (sram_base = qemu_ram_alloc(NULL, "omap2.sram",
+ s->sram_size)) | IO_MEM_RAM);
s->l4 = omap_l4_init(OMAP2_L4_BASE, 54);
@@ -139,7 +139,8 @@ static void sx1_init(ram_addr_t ram_size,
/* External Flash (EMIFS) */
cpu_register_physical_memory(OMAP_CS0_BASE, flash_size,
- qemu_ram_alloc(flash_size) | IO_MEM_ROM);
+ qemu_ram_alloc(NULL, "omap_sx1.flash0-0",
+ flash_size) | IO_MEM_ROM);
io = cpu_register_io_memory(static_readfn, static_writefn, &cs0val);
cpu_register_physical_memory(OMAP_CS0_BASE + flash_size,
@@ -157,7 +158,8 @@ static void sx1_init(ram_addr_t ram_size,
#endif
if ((dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
- if (!pflash_cfi01_register(OMAP_CS0_BASE, qemu_ram_alloc(flash_size),
+ if (!pflash_cfi01_register(OMAP_CS0_BASE, qemu_ram_alloc(NULL,
+ "omap_sx1.flash0-1", flash_size),
dinfo->bdrv, sector_size,
flash_size / sector_size,
4, 0, 0, 0, 0, be)) {
@@ -170,12 +172,14 @@ static void sx1_init(ram_addr_t ram_size,
if ((version == 1) &&
(dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
cpu_register_physical_memory(OMAP_CS1_BASE, flash1_size,
- qemu_ram_alloc(flash1_size) | IO_MEM_ROM);
+ qemu_ram_alloc(NULL, "omap_sx1.flash1-0",
+ flash1_size) | IO_MEM_ROM);
io = cpu_register_io_memory(static_readfn, static_writefn, &cs1val);
cpu_register_physical_memory(OMAP_CS1_BASE + flash1_size,
OMAP_CS1_SIZE - flash1_size, io);
- if (!pflash_cfi01_register(OMAP_CS1_BASE, qemu_ram_alloc(flash1_size),
+ if (!pflash_cfi01_register(OMAP_CS1_BASE, qemu_ram_alloc(NULL,
+ "omap_sx1.flash1-1", flash1_size),
dinfo->bdrv, sector_size,
flash1_size / sector_size,
4, 0, 0, 0, 0, be)) {
@@ -638,7 +638,7 @@ void *onenand_init(uint32_t id, int regshift, qemu_irq irq)
s->bdrv = dinfo->bdrv;
s->otp = memset(qemu_malloc((64 + 2) << PAGE_SHIFT),
0xff, (64 + 2) << PAGE_SHIFT);
- s->ram = qemu_ram_alloc(0xc000 << s->shift);
+ s->ram = qemu_ram_alloc(NULL, "onenand.ram", 0xc000 << s->shift);
ram = qemu_get_ram_ptr(s->ram);
s->boot[0] = ram + (0x0000 << s->shift);
s->boot[1] = ram + (0x8000 << s->shift);
@@ -213,7 +213,8 @@ static void palmte_init(ram_addr_t ram_size,
/* External Flash (EMIFS) */
cpu_register_physical_memory(OMAP_CS0_BASE, flash_size,
- qemu_ram_alloc(flash_size) | IO_MEM_ROM);
+ qemu_ram_alloc(NULL, "palmte.flash",
+ flash_size) | IO_MEM_ROM);
io = cpu_register_io_memory(static_readfn, static_writefn, &cs0val);
cpu_register_physical_memory(OMAP_CS0_BASE + flash_size,
@@ -896,7 +896,7 @@ void pc_memory_init(ram_addr_t ram_size,
linux_boot = (kernel_filename != NULL);
/* allocate RAM */
- ram_addr = qemu_ram_alloc(below_4g_mem_size);
+ ram_addr = qemu_ram_alloc(NULL, "pc.lowmem", below_4g_mem_size);
cpu_register_physical_memory(0, 0xa0000, ram_addr);
cpu_register_physical_memory(0x100000,
below_4g_mem_size - 0x100000,
@@ -907,7 +907,7 @@ void pc_memory_init(ram_addr_t ram_size,
#if TARGET_PHYS_ADDR_BITS == 32
hw_error("To much RAM for 32-bit physical address");
#else
- ram_addr = qemu_ram_alloc(above_4g_mem_size);
+ ram_addr = qemu_ram_alloc(NULL, "pc.highmem", above_4g_mem_size);
cpu_register_physical_memory(0x100000000ULL,
above_4g_mem_size,
ram_addr);
@@ -928,7 +928,7 @@ void pc_memory_init(ram_addr_t ram_size,
(bios_size % 65536) != 0) {
goto bios_error;
}
- bios_offset = qemu_ram_alloc(bios_size);
+ bios_offset = qemu_ram_alloc(NULL, "pc.bios", bios_size);
ret = rom_add_file_fixed(bios_name, (uint32_t)(-bios_size));
if (ret != 0) {
bios_error:
@@ -946,7 +946,7 @@ void pc_memory_init(ram_addr_t ram_size,
isa_bios_size,
(bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
- option_rom_offset = qemu_ram_alloc(PC_ROM_SIZE);
+ option_rom_offset = qemu_ram_alloc(NULL, "pc.rom", PC_ROM_SIZE);
cpu_register_physical_memory(PC_ROM_MIN_VGA, PC_ROM_SIZE, option_rom_offset);
/* map all the bios at the top of memory */
@@ -1713,6 +1713,7 @@ static int pci_add_option_rom(PCIDevice *pdev)
int size;
char *path;
void *ptr;
+ char name[32];
if (!pdev->romfile)
return 0;
@@ -1748,7 +1749,11 @@ static int pci_add_option_rom(PCIDevice *pdev)
size = 1 << qemu_fls(size);
}
- pdev->rom_offset = qemu_ram_alloc(size);
+ if (pdev->qdev.info->vmsd)
+ snprintf(name, sizeof(name), "%s.rom", pdev->qdev.info->vmsd->name);
+ else
+ snprintf(name, sizeof(name), "%s.rom", pdev->qdev.info->name);
+ pdev->rom_offset = qemu_ram_alloc(&pdev->qdev, name, size);
ptr = qemu_get_ram_ptr(pdev->rom_offset);
load_image(path, ptr);
@@ -137,14 +137,15 @@ petalogix_s3adsp1800_init(ram_addr_t ram_size,
qemu_register_reset(main_cpu_reset, env);
/* Attach emulated BRAM through the LMB. */
- phys_lmb_bram = qemu_ram_alloc(LMB_BRAM_SIZE);
+ phys_lmb_bram = qemu_ram_alloc(NULL, "petalogix_s3adsp1800.lmb_bram",
+ LMB_BRAM_SIZE);
cpu_register_physical_memory(0x00000000, LMB_BRAM_SIZE,
phys_lmb_bram | IO_MEM_RAM);
- phys_ram = qemu_ram_alloc(ram_size);
+ phys_ram = qemu_ram_alloc(NULL, "petalogix_s3adsp1800.ram", ram_size);
cpu_register_physical_memory(ddr_base, ram_size, phys_ram | IO_MEM_RAM);
- phys_flash = qemu_ram_alloc(FLASH_SIZE);
+ phys_flash = qemu_ram_alloc(NULL, "petalogix_s3adsp1800.flash", FLASH_SIZE);
dinfo = drive_get(IF_PFLASH, 0, 0);
pflash_cfi01_register(0xa0000000, phys_flash,
dinfo ? dinfo->bdrv : NULL, (64 * 1024),
@@ -190,7 +190,7 @@ static void ref405ep_init (ram_addr_t ram_size,
DriveInfo *dinfo;
/* XXX: fix this */
- ram_bases[0] = qemu_ram_alloc(0x08000000);
+ ram_bases[0] = qemu_ram_alloc(NULL, "ef405ep.ram", 0x08000000);
ram_sizes[0] = 0x08000000;
ram_bases[1] = 0x00000000;
ram_sizes[1] = 0x00000000;
@@ -202,7 +202,7 @@ static void ref405ep_init (ram_addr_t ram_size,
kernel_filename == NULL ? 0 : 1);
/* allocate SRAM */
sram_size = 512 * 1024;
- sram_offset = qemu_ram_alloc(sram_size);
+ sram_offset = qemu_ram_alloc(NULL, "ef405ep.sram", sram_size);
#ifdef DEBUG_BOARD_INIT
printf("%s: register SRAM at offset %08lx\n", __func__, sram_offset);
#endif
@@ -217,7 +217,7 @@ static void ref405ep_init (ram_addr_t ram_size,
dinfo = drive_get(IF_PFLASH, 0, fl_idx);
if (dinfo) {
bios_size = bdrv_getlength(dinfo->bdrv);
- bios_offset = qemu_ram_alloc(bios_size);
+ bios_offset = qemu_ram_alloc(NULL, "ef405ep.bios", bios_size);
fl_sectors = (bios_size + 65535) >> 16;
#ifdef DEBUG_BOARD_INIT
printf("Register parallel flash %d size " TARGET_FMT_lx
@@ -236,7 +236,7 @@ static void ref405ep_init (ram_addr_t ram_size,
#ifdef DEBUG_BOARD_INIT
printf("Load BIOS from file\n");
#endif
- bios_offset = qemu_ram_alloc(BIOS_SIZE);
+ bios_offset = qemu_ram_alloc(NULL, "ef405ep.bios", BIOS_SIZE);
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
@@ -509,9 +509,9 @@ static void taihu_405ep_init(ram_addr_t ram_size,
DriveInfo *dinfo;
/* RAM is soldered to the board so the size cannot be changed */
- ram_bases[0] = qemu_ram_alloc(0x04000000);
+ ram_bases[0] = qemu_ram_alloc(NULL, "taihu_405ep.ram-0", 0x04000000);
ram_sizes[0] = 0x04000000;
- ram_bases[1] = qemu_ram_alloc(0x04000000);
+ ram_bases[1] = qemu_ram_alloc(NULL, "taihu_405ep.ram-1", 0x04000000);
ram_sizes[1] = 0x04000000;
ram_size = 0x08000000;
#ifdef DEBUG_BOARD_INIT
@@ -531,7 +531,7 @@ static void taihu_405ep_init(ram_addr_t ram_size,
/* XXX: should check that size is 2MB */
// bios_size = 2 * 1024 * 1024;
fl_sectors = (bios_size + 65535) >> 16;
- bios_offset = qemu_ram_alloc(bios_size);
+ bios_offset = qemu_ram_alloc(NULL, "taihu_405ep.bios", bios_size);
#ifdef DEBUG_BOARD_INIT
printf("Register parallel flash %d size " TARGET_FMT_lx
" at offset %08lx addr " TARGET_FMT_lx " '%s' %d\n",
@@ -551,7 +551,7 @@ static void taihu_405ep_init(ram_addr_t ram_size,
#endif
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
- bios_offset = qemu_ram_alloc(BIOS_SIZE);
+ bios_offset = qemu_ram_alloc(NULL, "taihu_405ep.bios", BIOS_SIZE);
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
if (filename) {
bios_size = load_image(filename, qemu_get_ram_ptr(bios_offset));
@@ -580,7 +580,7 @@ static void taihu_405ep_init(ram_addr_t ram_size,
fl_idx, bios_size, bios_offset, (target_ulong)0xfc000000,
bdrv_get_device_name(dinfo->bdrv));
#endif
- bios_offset = qemu_ram_alloc(bios_size);
+ bios_offset = qemu_ram_alloc(NULL, "taihu_405ep.flash", bios_size);
pflash_cfi02_register(0xfc000000, bios_offset,
dinfo->bdrv, 65536, fl_sectors, 1,
4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
@@ -995,7 +995,7 @@ static void ppc405_ocm_init(CPUState *env)
ppc405_ocm_t *ocm;
ocm = qemu_mallocz(sizeof(ppc405_ocm_t));
- ocm->offset = qemu_ram_alloc(4096);
+ ocm->offset = qemu_ram_alloc(NULL, "ppc405.ocm", 4096);
qemu_register_reset(&ocm_reset, ocm);
ppc_dcr_register(env, OCM0_ISARC,
ocm, &dcr_read_ocm, &dcr_write_ocm);
@@ -668,7 +668,9 @@ ram_addr_t ppc4xx_sdram_adjust(ram_addr_t ram_size, int nr_banks,
unsigned int bank_size = sdram_bank_sizes[j];
if (bank_size <= size_left) {
- ram_bases[i] = qemu_ram_alloc(bank_size);
+ char name[32];
+ snprintf(name, sizeof(name), "ppc4xx.sdram%d", i);
+ ram_bases[i] = qemu_ram_alloc(NULL, name, bank_size);
ram_sizes[i] = bank_size;
size_left -= bank_size;
break;
@@ -173,11 +173,11 @@ static void ppc_core99_init (ram_addr_t ram_size,
}
/* allocate RAM */
- ram_offset = qemu_ram_alloc(ram_size);
+ ram_offset = qemu_ram_alloc(NULL, "ppc_core99.ram", ram_size);
cpu_register_physical_memory(0, ram_size, ram_offset);
/* allocate and load BIOS */
- bios_offset = qemu_ram_alloc(BIOS_SIZE);
+ bios_offset = qemu_ram_alloc(NULL, "ppc_core99.bios", BIOS_SIZE);
if (bios_name == NULL)
bios_name = PROM_FILENAME;
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
@@ -198,7 +198,7 @@ static void ppc_core99_init (ram_addr_t ram_size,
}
/* allocate and load VGA BIOS */
- vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE);
+ vga_bios_offset = qemu_ram_alloc(NULL, "ppc_core99.vbios", VGA_BIOS_SIZE);
vga_bios_ptr = qemu_get_ram_ptr(vga_bios_offset);
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, VGABIOS_FILENAME);
if (filename) {
@@ -179,11 +179,11 @@ static void ppc_heathrow_init (ram_addr_t ram_size,
exit(1);
}
- ram_offset = qemu_ram_alloc(ram_size);
+ ram_offset = qemu_ram_alloc(NULL, "ppc_heathrow.ram", ram_size);
cpu_register_physical_memory(0, ram_size, ram_offset);
/* allocate and load BIOS */
- bios_offset = qemu_ram_alloc(BIOS_SIZE);
+ bios_offset = qemu_ram_alloc(NULL, "ppc_heathrow.bios", BIOS_SIZE);
if (bios_name == NULL)
bios_name = PROM_FILENAME;
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
@@ -203,7 +203,7 @@ static void ppc_heathrow_init (ram_addr_t ram_size,
}
/* allocate and load VGA BIOS */
- vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE);
+ vga_bios_offset = qemu_ram_alloc(NULL, "ppc_heathrow.vbios", VGA_BIOS_SIZE);
vga_bios_ptr = qemu_get_ram_ptr(vga_bios_offset);
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, VGABIOS_FILENAME);
if (filename) {
@@ -604,11 +604,11 @@ static void ppc_prep_init (ram_addr_t ram_size,
}
/* allocate RAM */
- ram_offset = qemu_ram_alloc(ram_size);
+ ram_offset = qemu_ram_alloc(NULL, "ppc_prep.ram", ram_size);
cpu_register_physical_memory(0, ram_size, ram_offset);
/* allocate and load BIOS */
- bios_offset = qemu_ram_alloc(BIOS_SIZE);
+ bios_offset = qemu_ram_alloc(NULL, "ppc_prep.bios", BIOS_SIZE);
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
@@ -189,7 +189,8 @@ static void mpc8544ds_init(ram_addr_t ram_size,
ram_size &= ~(RAM_SIZES_ALIGN - 1);
/* Register Memory */
- cpu_register_physical_memory(0, ram_size, qemu_ram_alloc(ram_size));
+ cpu_register_physical_memory(0, ram_size, qemu_ram_alloc(NULL,
+ "mpc8544ds.ram", ram_size));
/* MPIC */
irqs = qemu_mallocz(sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
@@ -2054,9 +2054,11 @@ PXA2xxState *pxa270_init(unsigned int sdram_size, const char *revision)
/* SDRAM & Internal Memory Storage */
cpu_register_physical_memory(PXA2XX_SDRAM_BASE,
- sdram_size, qemu_ram_alloc(sdram_size) | IO_MEM_RAM);
+ sdram_size, qemu_ram_alloc(NULL, "pxa270.sdram",
+ sdram_size) | IO_MEM_RAM);
cpu_register_physical_memory(PXA2XX_INTERNAL_BASE,
- 0x40000, qemu_ram_alloc(0x40000) | IO_MEM_RAM);
+ 0x40000, qemu_ram_alloc(NULL, "pxa270.internal",
+ 0x40000) | IO_MEM_RAM);
s->pic = pxa2xx_pic_init(0x40d00000, s->env);
@@ -2175,9 +2177,11 @@ PXA2xxState *pxa255_init(unsigned int sdram_size)
/* SDRAM & Internal Memory Storage */
cpu_register_physical_memory(PXA2XX_SDRAM_BASE, sdram_size,
- qemu_ram_alloc(sdram_size) | IO_MEM_RAM);
+ qemu_ram_alloc(NULL, "pxa255.sdram",
+ sdram_size) | IO_MEM_RAM);
cpu_register_physical_memory(PXA2XX_INTERNAL_BASE, PXA2XX_INTERNAL_SIZE,
- qemu_ram_alloc(PXA2XX_INTERNAL_SIZE) | IO_MEM_RAM);
+ qemu_ram_alloc(NULL, "pxa255.internal",
+ PXA2XX_INTERNAL_SIZE) | IO_MEM_RAM);
s->pic = pxa2xx_pic_init(0x40d00000, s->env);
@@ -242,7 +242,7 @@ static void r2d_init(ram_addr_t ram_size,
}
/* Allocate memory space */
- sdram_addr = qemu_ram_alloc(SDRAM_SIZE);
+ sdram_addr = qemu_ram_alloc(NULL, "r2d.sdram", SDRAM_SIZE);
cpu_register_physical_memory(SDRAM_BASE, SDRAM_SIZE, sdram_addr);
/* Register peripherals */
s = sh7750_init(env);
@@ -257,7 +257,7 @@ static void r2d_init(ram_addr_t ram_size,
dinfo, NULL);
/* onboard flash memory */
- pflash_cfi02_register(0x0, qemu_ram_alloc(FLASH_SIZE),
+ pflash_cfi02_register(0x0, qemu_ram_alloc(NULL, "r2d.flash", FLASH_SIZE),
dinfo ? dinfo->bdrv : NULL, (16 * 1024),
FLASH_SIZE >> 16,
1, 4, 0x0000, 0x0000, 0x0000, 0x0000,
@@ -196,12 +196,12 @@ static void realview_init(ram_addr_t ram_size,
/* Core tile RAM. */
low_ram_size = ram_size - 0x20000000;
ram_size = 0x20000000;
- ram_offset = qemu_ram_alloc(low_ram_size);
+ ram_offset = qemu_ram_alloc(NULL, "realview.lowmem", low_ram_size);
cpu_register_physical_memory(0x20000000, low_ram_size,
ram_offset | IO_MEM_RAM);
}
- ram_offset = qemu_ram_alloc(ram_size);
+ ram_offset = qemu_ram_alloc(NULL, "realview.highmem", ram_size);
low_ram_size = ram_size;
if (low_ram_size > 0x10000000)
low_ram_size = 0x10000000;
@@ -354,7 +354,7 @@ static void realview_init(ram_addr_t ram_size,
startup code. I guess this works on real hardware because the
BootROM happens to be in ROM/flash or in memory that isn't clobbered
until after Linux boots the secondary CPUs. */
- ram_offset = qemu_ram_alloc(0x1000);
+ ram_offset = qemu_ram_alloc(NULL, "realview.hack", 0x1000);
cpu_register_physical_memory(SMP_BOOT_ADDR, 0x1000,
ram_offset | IO_MEM_RAM);
@@ -157,7 +157,7 @@ static void s390_init(ram_addr_t ram_size,
s390_bus = s390_virtio_bus_init(&ram_size);
/* allocate RAM */
- ram_addr = qemu_ram_alloc(ram_size);
+ ram_addr = qemu_ram_alloc(NULL, "s390.ram", ram_size);
cpu_register_physical_memory(0, ram_size, ram_addr);
/* init CPUs */
@@ -1371,7 +1371,7 @@ void sm501_init(uint32_t base, uint32_t local_mem_bytes, qemu_irq irq,
s->dc_crt_control = 0x00010000;
/* allocate local memory */
- s->local_mem_offset = qemu_ram_alloc(local_mem_bytes);
+ s->local_mem_offset = qemu_ram_alloc(NULL, "sm501.local", local_mem_bytes);
s->local_mem = qemu_get_ram_ptr(s->local_mem_offset);
cpu_register_physical_memory(base, local_mem_bytes, s->local_mem_offset);
@@ -966,7 +966,7 @@ static void spitz_common_init(ram_addr_t ram_size,
sl_flash_register(cpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
cpu_register_physical_memory(0, SPITZ_ROM,
- qemu_ram_alloc(SPITZ_ROM) | IO_MEM_ROM);
+ qemu_ram_alloc(NULL, "spitz.rom", SPITZ_ROM) | IO_MEM_ROM);
/* Setup peripherals */
spitz_keyboard_register(cpu);
@@ -592,7 +592,7 @@ static int idreg_init1(SysBusDevice *dev)
{
ram_addr_t idreg_offset;
- idreg_offset = qemu_ram_alloc(sizeof(idreg_data));
+ idreg_offset = qemu_ram_alloc(NULL, "sun4m.idreg", sizeof(idreg_data));
sysbus_init_mmio(dev, sizeof(idreg_data), idreg_offset | IO_MEM_ROM);
return 0;
}
@@ -627,7 +627,7 @@ static int afx_init1(SysBusDevice *dev)
{
ram_addr_t afx_offset;
- afx_offset = qemu_ram_alloc(4);
+ afx_offset = qemu_ram_alloc(NULL, "sun4m.afx", 4);
sysbus_init_mmio(dev, 4, afx_offset | IO_MEM_RAM);
return 0;
}
@@ -690,7 +690,7 @@ static int prom_init1(SysBusDevice *dev)
{
ram_addr_t prom_offset;
- prom_offset = qemu_ram_alloc(PROM_SIZE_MAX);
+ prom_offset = qemu_ram_alloc(NULL, "sun4m.prom", PROM_SIZE_MAX);
sysbus_init_mmio(dev, PROM_SIZE_MAX, prom_offset | IO_MEM_ROM);
return 0;
}
@@ -725,7 +725,7 @@ static int ram_init1(SysBusDevice *dev)
RAM_size = d->size;
- ram_offset = qemu_ram_alloc(RAM_size);
+ ram_offset = qemu_ram_alloc(NULL, "sun4m.ram", RAM_size);
sysbus_init_mmio(dev, RAM_size, ram_offset);
return 0;
}
@@ -629,7 +629,7 @@ static int prom_init1(SysBusDevice *dev)
{
ram_addr_t prom_offset;
- prom_offset = qemu_ram_alloc(PROM_SIZE_MAX);
+ prom_offset = qemu_ram_alloc(NULL, "sun4u.prom", PROM_SIZE_MAX);
sysbus_init_mmio(dev, PROM_SIZE_MAX, prom_offset | IO_MEM_ROM);
return 0;
}
@@ -665,7 +665,7 @@ static int ram_init1(SysBusDevice *dev)
RAM_size = d->size;
- ram_offset = qemu_ram_alloc(RAM_size);
+ ram_offset = qemu_ram_alloc(NULL, "sun4u.ram", RAM_size);
sysbus_init_mmio(dev, RAM_size, ram_offset);
return 0;
}
@@ -51,7 +51,7 @@ static void syborg_init(ram_addr_t ram_size,
}
/* RAM at address zero. */
- ram_addr = qemu_ram_alloc(ram_size);
+ ram_addr = qemu_ram_alloc(NULL, "syborg.ram", ram_size);
cpu_register_physical_memory(0, ram_size, ram_addr | IO_MEM_RAM);
cpu_pic = arm_pic_init_cpu(env);
@@ -593,7 +593,7 @@ TC6393xbState *tc6393xb_init(uint32_t base, qemu_irq irq)
tc6393xb_writefn, s);
cpu_register_physical_memory(base, 0x10000, iomemtype);
- s->vram_addr = qemu_ram_alloc(0x100000);
+ s->vram_addr = qemu_ram_alloc(NULL, "tc6393xb.vram", 0x100000);
s->vram_ptr = qemu_get_ram_ptr(s->vram_addr);
cpu_register_physical_memory(base + 0x100000, 0x100000, s->vram_addr);
s->scr_width = 480;
@@ -510,7 +510,7 @@ static int tcx_init1(SysBusDevice *dev)
int size;
uint8_t *vram_base;
- vram_offset = qemu_ram_alloc(s->vram_size * (1 + 4 + 4));
+ vram_offset = qemu_ram_alloc(NULL, "tcx.vram", s->vram_size * (1 + 4 + 4));
vram_base = qemu_get_ram_ptr(vram_offset);
s->vram_offset = vram_offset;
@@ -215,7 +215,7 @@ static void tosa_init(ram_addr_t ram_size,
cpu = pxa255_init(tosa_binfo.ram_size);
cpu_register_physical_memory(0, TOSA_ROM,
- qemu_ram_alloc(TOSA_ROM) | IO_MEM_ROM);
+ qemu_ram_alloc(NULL, "tosa.rom", TOSA_ROM) | IO_MEM_ROM);
tmio = tc6393xb_init(0x10000000,
pxa2xx_gpio_in_get(cpu->gpio)[TOSA_GPIO_TC6393XB_INT]);
@@ -180,7 +180,7 @@ static void versatile_init(ram_addr_t ram_size,
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
}
- ram_offset = qemu_ram_alloc(ram_size);
+ ram_offset = qemu_ram_alloc(NULL, "versatile.ram", ram_size);
/* ??? RAM should repeat to fill physical memory space. */
/* SDRAM at address zero. */
cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
@@ -2261,7 +2261,7 @@ void vga_common_init(VGACommonState *s, int vga_ram_size)
#else
s->is_vbe_vmstate = 0;
#endif
- s->vram_offset = qemu_ram_alloc(vga_ram_size);
+ s->vram_offset = qemu_ram_alloc(NULL, "vga.vram", vga_ram_size);
s->vram_ptr = qemu_get_ram_ptr(s->vram_offset);
s->vram_size = vga_ram_size;
s->get_bpp = vga_get_bpp;
@@ -1164,7 +1164,7 @@ static void vmsvga_init(struct vmsvga_state_s *s, int vga_ram_size)
s->fifo_size = SVGA_FIFO_SIZE;
- s->fifo_offset = qemu_ram_alloc(s->fifo_size);
+ s->fifo_offset = qemu_ram_alloc(NULL, "vmsvga.fifo", s->fifo_size);
s->fifo_ptr = qemu_get_ram_ptr(s->fifo_offset);
vga_common_init(&s->vga, vga_ram_size);
These will be used to generate unique id strings for ramblocks. The name field is required, the device pointer is optional as most callers don't have a device. When there's no device or the device isn't a child of a bus implementing BusInfo.get_dev_path, the name should be unique for the platform. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> --- cpu-common.h | 2 +- exec.c | 2 +- hw/an5206.c | 4 ++-- hw/armv7m.c | 9 ++++++--- hw/axis_dev88.c | 4 ++-- hw/dummy_m68k.c | 2 +- hw/etraxfs.c | 6 +++--- hw/g364fb.c | 2 +- hw/gumstix.c | 6 ++++-- hw/integratorcp.c | 4 ++-- hw/mainstone.c | 6 ++++-- hw/mcf5208.c | 4 ++-- hw/mips_jazz.c | 4 ++-- hw/mips_malta.c | 4 ++-- hw/mips_mipssim.c | 4 ++-- hw/mips_r4k.c | 6 +++--- hw/musicpal.c | 11 +++++++---- hw/omap1.c | 6 ++++-- hw/omap2.c | 6 ++++-- hw/omap_sx1.c | 12 ++++++++---- hw/onenand.c | 2 +- hw/palm.c | 3 ++- hw/pc.c | 8 ++++---- hw/pci.c | 7 ++++++- hw/petalogix_s3adsp1800_mmu.c | 7 ++++--- hw/ppc405_boards.c | 18 +++++++++--------- hw/ppc405_uc.c | 2 +- hw/ppc4xx_devs.c | 4 +++- hw/ppc_newworld.c | 6 +++--- hw/ppc_oldworld.c | 6 +++--- hw/ppc_prep.c | 4 ++-- hw/ppce500_mpc8544ds.c | 3 ++- hw/pxa2xx.c | 12 ++++++++---- hw/r2d.c | 4 ++-- hw/realview.c | 6 +++--- hw/s390-virtio.c | 2 +- hw/sm501.c | 2 +- hw/spitz.c | 2 +- hw/sun4m.c | 8 ++++---- hw/sun4u.c | 4 ++-- hw/syborg.c | 2 +- hw/tc6393xb.c | 2 +- hw/tcx.c | 2 +- hw/tosa.c | 2 +- hw/versatilepb.c | 2 +- hw/vga.c | 2 +- hw/vmware_vga.c | 2 +- 47 files changed, 130 insertions(+), 98 deletions(-)