Message ID | 20091015215157.GD7071@volta.aurel32.net |
---|---|
State | New |
Headers | show |
On Thu, Oct 15, 2009 at 11:51 PM, Aurelien Jarno <aurelien@aurel32.net> wrote: > Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> > --- > target-arm/translate.c | 4 ++++ > 1 files changed, 4 insertions(+), 0 deletions(-) > > diff --git a/target-arm/translate.c b/target-arm/translate.c > index 0c10ac2..bb0f8ef 100644 > --- a/target-arm/translate.c > +++ b/target-arm/translate.c > @@ -8805,6 +8805,10 @@ static inline void gen_intermediate_code_internal(CPUState *env, > if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO)) > gen_io_start(); > > + if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) { > + tcg_gen_debug_insn_start(dc->pc); > + } > + > if (env->thumb) { > disas_thumb_insn(env, dc); > if (dc->condexec_mask) { > -- > 1.6.1.3 Shouldn't you dump the TCG debug instruction before the check for gen_io_start? Laurent
On Sun, Oct 18, 2009 at 04:29:52PM +0200, Laurent Desnogues wrote: > On Thu, Oct 15, 2009 at 11:51 PM, Aurelien Jarno <aurelien@aurel32.net> wrote: > > Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> > > --- > > target-arm/translate.c | 4 ++++ > > 1 files changed, 4 insertions(+), 0 deletions(-) > > > > diff --git a/target-arm/translate.c b/target-arm/translate.c > > index 0c10ac2..bb0f8ef 100644 > > --- a/target-arm/translate.c > > +++ b/target-arm/translate.c > > @@ -8805,6 +8805,10 @@ static inline void gen_intermediate_code_internal(CPUState *env, > > if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO)) > > gen_io_start(); > > > > + if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) { > > + tcg_gen_debug_insn_start(dc->pc); > > + } > > + > > if (env->thumb) { > > disas_thumb_insn(env, dc); > > if (dc->condexec_mask) { > > -- > > 1.6.1.3 > > Shouldn't you dump the TCG debug instruction before the > check for gen_io_start? > Good question. I have mainly added this debug code at the same location as on other architecture. The question is does the gen_io code actually belong to an op?
diff --git a/target-arm/translate.c b/target-arm/translate.c index 0c10ac2..bb0f8ef 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -8805,6 +8805,10 @@ static inline void gen_intermediate_code_internal(CPUState *env, if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO)) gen_io_start(); + if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) { + tcg_gen_debug_insn_start(dc->pc); + } + if (env->thumb) { disas_thumb_insn(env, dc); if (dc->condexec_mask) {
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> --- target-arm/translate.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-)