From patchwork Thu Sep 17 16:07:23 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vince Weaver X-Patchwork-Id: 33792 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 7EE92B7B73 for ; Fri, 18 Sep 2009 02:12:48 +1000 (EST) Received: from localhost ([127.0.0.1]:54161 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MoJbB-0005Ek-6A for incoming@patchwork.ozlabs.org; Thu, 17 Sep 2009 12:12:45 -0400 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MoJWK-0003Mn-7e for qemu-devel@nongnu.org; Thu, 17 Sep 2009 12:07:44 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MoJWF-0003Kb-KD for qemu-devel@nongnu.org; Thu, 17 Sep 2009 12:07:43 -0400 Received: from [199.232.76.173] (port=43415 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MoJWF-0003KS-Cy for qemu-devel@nongnu.org; Thu, 17 Sep 2009 12:07:39 -0400 Received: from csl.cornell.edu ([128.84.224.10]:2976 helo=vlsi.csl.cornell.edu) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MoJWE-0007lt-OF for qemu-devel@nongnu.org; Thu, 17 Sep 2009 12:07:39 -0400 Received: from stanley.csl.cornell.edu (stanley.csl.cornell.edu [128.84.224.15]) by vlsi.csl.cornell.edu (8.13.4/8.13.4) with ESMTP id n8HG7N63044528; Thu, 17 Sep 2009 12:07:28 -0400 (EDT) Date: Thu, 17 Sep 2009 12:07:23 -0400 (EDT) From: Vince Weaver To: Aurelien Jarno Subject: Re: [Qemu-devel] [PATCH] Fix extlh instruction on Alpha In-Reply-To: <20090916205646.GA28487@hall.aurel32.net> Message-ID: <20090917120406.J54069@stanley.csl.cornell.edu> References: <20090909120628.J4195@stanley.csl.cornell.edu> <20090916195242.GE770@volta.aurel32.net> <20090916163826.M50839@stanley.csl.cornell.edu> <20090916205646.GA28487@hall.aurel32.net> MIME-Version: 1.0 X-detected-operating-system: by monty-python.gnu.org: FreeBSD 2.0-4.2 Cc: qemu-devel@nongnu.org X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org On Wed, 16 Sep 2009, Aurelien Jarno wrote: > In case tmp1 = 0, it becomes 64, and then 0 again after the and, so > rc=ra<<0. Ah, I see. I completely missed that optimization. How does this updated patch look? I removed one of the TCGv variables too. Does that help performance? What would be nice is a tcg subtract-from instruction, which I know some architectures have. Maybe tcg does have it and I should look harder. diff --git a/target-alpha/translate.c b/target-alpha/translate.c index 9d2bc45..af2a43c 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -524,14 +524,16 @@ static inline void gen_ext_h(void(*tcg_gen_ext_i64)(TCGv t0, TCGv t1), else tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[ra]); } else { - TCGv tmp1, tmp2; + TCGv tmp1; tmp1 = tcg_temp_new(); + tcg_gen_andi_i64(tmp1, cpu_ir[rb], 7); tcg_gen_shli_i64(tmp1, tmp1, 3); - tmp2 = tcg_const_i64(64); - tcg_gen_sub_i64(tmp1, tmp2, tmp1); - tcg_temp_free(tmp2); + tcg_gen_andi_i64(tmp1, tmp1, 0x3f); + tcg_gen_neg_i64(tmp1, tmp1); + tcg_gen_addi_i64(tmp1, tmp1, 64); tcg_gen_shl_i64(cpu_ir[rc], cpu_ir[ra], tmp1); + tcg_temp_free(tmp1); } if (tcg_gen_ext_i64) @@ -1316,7 +1318,7 @@ static inline int translate_one(DisasContext *ctx, uint32_t insn) break; case 0x6A: /* EXTLH */ - gen_ext_h(&tcg_gen_ext16u_i64, ra, rb, rc, islit, lit); + gen_ext_h(&tcg_gen_ext32u_i64, ra, rb, rc, islit, lit); break; case 0x72: /* MSKQH */