From patchwork Thu Jun 26 05:02:43 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 364241 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 5D40A1400AB for ; Thu, 26 Jun 2014 15:04:37 +1000 (EST) Received: from localhost ([::1]:42270 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X01rP-0003xZ-IS for incoming@patchwork.ozlabs.org; Thu, 26 Jun 2014 01:04:35 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49520) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X01po-000145-9w for qemu-devel@nongnu.org; Thu, 26 Jun 2014 01:03:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1X01pi-0006t6-84 for qemu-devel@nongnu.org; Thu, 26 Jun 2014 01:02:56 -0400 Received: from mail-ie0-x232.google.com ([2607:f8b0:4001:c03::232]:52160) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X01pi-0006sy-38 for qemu-devel@nongnu.org; Thu, 26 Jun 2014 01:02:50 -0400 Received: by mail-ie0-f178.google.com with SMTP id rd18so2612280iec.9 for ; Wed, 25 Jun 2014 22:02:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=GjP1BZrDj/iUZrMvQlTAJAy+nIYqnsgxaVgPUQf8Qio=; b=t7sR1Nz6qFZ/7IWlL3yo8fsHoM9bPaWsmajzfnW0woqLw1l7wcUXKbJVAD3OOBTSJ6 157uGtVpCVo8c1WsXbDR/89g0RUCEPhGtz7YMOX9IJi+aCuFByOATKhZstmrNgkoiNxv OWUnzsFdGlEAwR83bh80Jfz0VeH8udlS0LZZ/nkbbdfcQjUAu/z8nvwjhDgsAsaKbfIe 8cBAjK6PYV7M+9mT9cr2NsF75A+OW6F0AOz0HF5FlzJTrjt+k8LttvNSOdZmORRwuhSe 2ti2J3Z+Rupl4iyCN0/ZPCiPWSQItf4jl9QryMCfzRieJKT8Sx20NLq453F0XUjEBOAp sDBA== X-Received: by 10.43.178.197 with SMTP id ox5mr11458914icc.22.1403758969566; Wed, 25 Jun 2014 22:02:49 -0700 (PDT) Received: from localhost ([203.126.243.116]) by mx.google.com with ESMTPSA id d3sm1053371igc.17.2014.06.25.22.02.46 for (version=TLSv1.1 cipher=RC4-SHA bits=128/128); Wed, 25 Jun 2014 22:02:48 -0700 (PDT) From: Alistair Francis To: qemu-devel@nongnu.org Date: Thu, 26 Jun 2014 15:02:43 +1000 Message-Id: <1d64c94c137074155239becad84180b9d17e828d.1403757527.git.alistair.francis@xilinx.com> X-Mailer: git-send-email 1.9.0 In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:4001:c03::232 Cc: peter.maydell@linaro.org, peter.crosthwaite@xilinx.com, cov@codeaurora.org, alistair.francis@xilinx.com Subject: [Qemu-devel] [PATCH v2 6/7] target-arm: Implement pmccfiltr_write function X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This is the function that is called when writing to the PMCCFILTR_EL0 register Signed-off-by: Alistair Francis --- target-arm/helper.c | 9 +++++++++ 1 files changed, 9 insertions(+), 0 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 0bd00cb..e78c5a7 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -664,6 +664,14 @@ static void pmccntr_write(CPUARMState *env, const ARMCPRegInfo *ri, } #endif +static void pmccfiltr_write(CPUARMState *env, const ARMCPRegInfo *ri, + uint64_t value) +{ + pmccntr_sync(env); + env->cp15.pmccfiltr_el0 = value & 0x7E000000; + pmccntr_sync(env); +} + static void pmcntenset_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value) { @@ -826,6 +834,7 @@ static const ARMCPRegInfo v7_cp_reginfo[] = { #endif { .name = "PMCCFILTR_EL0", .state = ARM_CP_STATE_AA64, .opc0 = 3, .opc1 = 3, .crn = 14, .crm = 15, .opc2 = 7, + .writefn = pmccfiltr_write, .access = PL0_RW, .accessfn = pmreg_access, .state = ARM_CP_STATE_AA64, .resetvalue = 0,