@@ -49,8 +49,16 @@ static inline PCIDevice *pci_dev_find_by_addr(PCIBus *bus, uint32_t addr)
}
void pci_host_config_write_common(PCIDevice *pci_dev, uint32_t addr,
- uint32_t limit, uint32_t val, uint32_t len)
+ uint32_t val, uint32_t len)
{
+ uint32_t limit = pci_config_size(pci_dev);
+
+ if (limit <= addr) {
+ /* conventional pci device can be behind pcie-to-pci bridge.
+ 256 <= addr < 4K has no effects. */
+ return;
+ }
+
assert(len <= 4);
trace_pci_cfg_write(pci_dev->name, PCI_SLOT(pci_dev->devfn),
PCI_FUNC(pci_dev->devfn), addr, val);
@@ -89,8 +97,7 @@ void pci_data_write(PCIBus *s, uint32_t addr, uint32_t val, int len)
PCI_DPRINTF("%s: %s: addr=%02" PRIx32 " val=%08" PRIx32 " len=%d\n",
__func__, pci_dev->name, config_addr, val, len);
- pci_host_config_write_common(pci_dev, config_addr, PCI_CONFIG_SPACE_SIZE,
- val, len);
+ pci_host_config_write_common(pci_dev, config_addr, val, len);
}
uint32_t pci_data_read(PCIBus *s, uint32_t addr, int len)
@@ -39,19 +39,12 @@ static void pcie_mmcfg_data_write(void *opaque, hwaddr mmcfg_addr,
PCIBus *s = e->pci.bus;
PCIDevice *pci_dev = pcie_dev_find_by_mmcfg_addr(s, mmcfg_addr);
uint32_t addr;
- uint32_t limit;
if (!pci_dev) {
return;
}
addr = PCIE_MMCFG_CONFOFFSET(mmcfg_addr);
- limit = pci_config_size(pci_dev);
- if (limit <= addr) {
- /* conventional pci device can be behind pcie-to-pci bridge.
- 256 <= addr < 4K has no effects. */
- return;
- }
- pci_host_config_write_common(pci_dev, addr, limit, val, len);
+ pci_host_config_write_common(pci_dev, addr, val, len);
}
static uint64_t pcie_mmcfg_data_read(void *opaque,
@@ -171,8 +171,7 @@ static void finish_write_pci_config(sPAPREnvironment *spapr, uint64_t buid,
return;
}
- pci_host_config_write_common(pci_dev, addr, pci_config_size(pci_dev),
- val, size);
+ pci_host_config_write_common(pci_dev, addr, val, size);
rtas_st(rets, 0, RTAS_OUT_SUCCESS);
}
@@ -63,7 +63,7 @@ typedef struct PCIHostBridgeClass {
/* common internal helpers for PCI/PCIe hosts, cut off overflows */
void pci_host_config_write_common(PCIDevice *pci_dev, uint32_t addr,
- uint32_t limit, uint32_t val, uint32_t len);
+ uint32_t val, uint32_t len);
uint32_t pci_host_config_read_common(PCIDevice *pci_dev, uint32_t addr,
uint32_t len);
Since the limit parameter is always set to the size of pci device's configuration space, and we can determine the size from the type of pci device. Signed-off-by: Hu Tao <hutao@cn.fujitsu.com> --- hw/pci/pci_host.c | 13 ++++++++++--- hw/pci/pcie_host.c | 9 +-------- hw/ppc/spapr_pci.c | 3 +-- include/hw/pci/pci_host.h | 2 +- 4 files changed, 13 insertions(+), 14 deletions(-)