diff mbox series

[qemu,v3] fdt_load_addr is getting assigned as the result of riscv_compute_fdt_addr(), which is an uint64_t.

Message ID 168753067876.24231.11584763305862806528-0@git.sr.ht
State New
Headers show
Series [qemu,v3] fdt_load_addr is getting assigned as the result of riscv_compute_fdt_addr(), which is an uint64_t. | expand

Commit Message

~rlakshmibai June 20, 2023, 1:50 p.m. UTC 
From: Lakshmi Bai Raja Subramanian <lakshmi.bai.rajasubramanian@bodhicomputing.com>

fdt_load_addr is declared as uint32_t which is not matching with the
return data type of riscv_compute_fdt_addr. Modified fdt_load_addr data type
to uint64_t to match the riscv_compute_fdt_addr() return data type. This fix
also helps in calculating the right fdt address when DRAM is mapped to higher
64-bit address.

Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Lakshmi Bai Raja Subramanian <lakshmi.bai.rajasubramanian@bodhicomputing.com>
---
 hw/riscv/virt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 95708d890e..c348529ac0 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -1244,7 +1244,7 @@  static void virt_machine_done(Notifier *notifier, void *data)
     target_ulong start_addr = memmap[VIRT_DRAM].base;
     target_ulong firmware_end_addr, kernel_start_addr;
     const char *firmware_name = riscv_default_firmware_name(&s->soc[0]);
-    uint32_t fdt_load_addr;
+    uint64_t fdt_load_addr;
     uint64_t kernel_entry = 0;
     BlockBackend *pflash_blk0;