@@ -124,8 +124,8 @@ static Property gen_rp_props[] = {
res_reserve.mem_pref_32, -1),
DEFINE_PROP_SIZE("pref64-reserve", GenPCIERootPort,
res_reserve.mem_pref_64, -1),
- DEFINE_PROP_PCIE_LINK_SPEED("speed", PCIESlot, speed, PCIE_LINK_SPEED_2_5),
- DEFINE_PROP_PCIE_LINK_WIDTH("width", PCIESlot, width, PCIE_LINK_WIDTH_1),
+ DEFINE_PROP_PCIE_LINK_SPEED("speed", PCIESlot, speed, PCIE_LINK_SPEED_16),
+ DEFINE_PROP_PCIE_LINK_WIDTH("width", PCIESlot, width, PCIE_LINK_WIDTH_32),
DEFINE_PROP_END_OF_LIST()
};
@@ -2,7 +2,15 @@
#define HW_COMPAT_H
#define HW_COMPAT_3_1 \
- /* empty */
+ {\
+ .driver = "pcie-root-port",\
+ .property = "speed",\
+ .value = "2_5",\
+ },{\
+ .driver = "pcie-root-port",\
+ .property = "width",\
+ .value = "1",\
+ },
#define HW_COMPAT_3_0 \
/* empty */
Change the default speed and width for new machine types to the fastest and widest currently supported. This should be compatible to the PCIe 4.0 spec. Pre-QEMU-3.2 machine types remain at 2.5GT/s, x1 width. Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com> --- hw/pci-bridge/gen_pcie_root_port.c | 4 ++-- include/hw/compat.h | 10 +++++++++- 2 files changed, 11 insertions(+), 3 deletions(-)