From patchwork Thu Mar 1 10:33:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Liu, Yi L" X-Patchwork-Id: 879703 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.intel.com Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3zsTnv48f0z9s06 for ; Thu, 1 Mar 2018 21:54:11 +1100 (AEDT) Received: from localhost ([::1]:55523 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1erLqj-00083L-Gy for incoming@patchwork.ozlabs.org; Thu, 01 Mar 2018 05:54:09 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53264) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1erLnY-0005p3-U6 for qemu-devel@nongnu.org; Thu, 01 Mar 2018 05:50:53 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1erLnU-0000Ev-64 for qemu-devel@nongnu.org; Thu, 01 Mar 2018 05:50:52 -0500 Received: from mga14.intel.com ([192.55.52.115]:7359) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1erLnT-00006Y-Q1 for qemu-devel@nongnu.org; Thu, 01 Mar 2018 05:50:48 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Mar 2018 02:50:47 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.47,408,1515484800"; d="scan'208";a="208048738" Received: from sky-dev.bj.intel.com ([10.238.144.105]) by fmsmga006.fm.intel.com with ESMTP; 01 Mar 2018 02:50:45 -0800 From: "Liu, Yi L" To: qemu-devel@nongnu.org, mst@redhat.com, david@gibson.dropbear.id.au Date: Thu, 1 Mar 2018 18:33:33 +0800 Message-Id: <1519900415-30314-11-git-send-email-yi.l.liu@linux.intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1519900415-30314-1-git-send-email-yi.l.liu@linux.intel.com> References: <1519900415-30314-1-git-send-email-yi.l.liu@linux.intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.115 Subject: [Qemu-devel] [PATCH v3 10/12] intel_iommu: bind guest pasid table to host X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Liu, Yi L" , kevin.tian@intel.com, yi.l.liu@intel.com, jasowang@redhat.com, peterx@redhat.com, alex.williamson@redhat.com, pbonzini@redhat.com, eric.auger.pro@gmail.com Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" For assigned SVA capable devices, needs to bind guest pasid table to host. Intel vIOMMU emulator captures device selective context cache flush, and propagate the guest pasid table pointer to host, in host iommu driver configs the guest pasid table pointer in its translation structure. Signed-off-by: Liu, Yi L --- hw/i386/intel_iommu.c | 69 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 978f47a..d92a66d 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -37,6 +37,10 @@ #include "kvm_i386.h" #include "trace.h" +static bool vtd_device_is_assigned(IntelIOMMUState *s, + PCIBus *bus, + uint16_t devfn); + static void vtd_define_quad(IntelIOMMUState *s, hwaddr addr, uint64_t val, uint64_t wmask, uint64_t w1cmask) { @@ -1255,6 +1259,20 @@ static void vtd_context_global_invalidate(IntelIOMMUState *s) vtd_iommu_replay_all(s); } +static uint64_t vtd_get_pasid_table_from_context(VTDContextEntry *ce) +{ + uint64_t pasidt_addr = ce->hi; + /* TODO: TBD */ + return pasidt_addr; +} + +static uint32_t vtd_get_pasidt_size_from_context(VTDContextEntry *ce) +{ + uint32_t pasidt_size = ce->hi; + /* TODO: TBD */ + return pasidt_size; +} + /* Do a context-cache device-selective invalidation. * @func_mask: FM field after shifting */ @@ -1291,6 +1309,11 @@ static void vtd_context_device_invalidate(IntelIOMMUState *s, if (vtd_bus) { devfn = VTD_SID_TO_DEVFN(source_id); for (devfn_it = 0; devfn_it < PCI_DEVFN_MAX; ++devfn_it) { + VTDContextEntry ce; + int ret = 0; + uint64_t pasidt_addr; + uint32_t size; + vtd_as = vtd_bus->dev_as[devfn_it]; if (vtd_as && ((devfn_it & mask) == (devfn & mask))) { trace_vtd_inv_desc_cc_device(bus_n, VTD_PCI_SLOT(devfn_it), @@ -1311,6 +1334,26 @@ static void vtd_context_device_invalidate(IntelIOMMUState *s, * happened. */ memory_region_iommu_replay_all(&vtd_as->iommu); + + /* + * If device is SVA capable assigned device, needs + * to bind guest pasid table to host + * + */ + if (!vtd_device_is_assigned(s, vtd_as->bus, devfn_it)) { + continue; + } + + ret = vtd_dev_to_context_entry(s, bus_n, + vtd_as->devfn, &ce); + if (ret) { + continue; + } + + pasidt_addr = vtd_get_pasid_table_from_context(&ce); + size = vtd_get_pasidt_size_from_context(&ce); + pci_device_sva_bind_pasid_table(vtd_as->bus, devfn_it, + pasidt_addr, size); } } } @@ -3046,6 +3089,32 @@ static int vtd_device_notify(PCIBus *bus, return 0; } +static bool vtd_device_is_assigned(IntelIOMMUState *s, + PCIBus *bus, + uint16_t devfn) +{ + VTDAddressSpace *vtd_as; + IntelIOMMUAssignedDeviceNode *node = NULL; + IntelIOMMUAssignedDeviceNode *next_node = NULL; + + vtd_as = vtd_find_add_as(s, bus, devfn, false); + + if (vtd_as == NULL) { + /* + * If vtd_as is NULL, return false for safe + */ + return false; + } + + QLIST_FOREACH_SAFE(node, &s->assigned_device_list, next, next_node) { + if (node->vtd_as == vtd_as) { + return true; + } + } + + return false; +} + static bool vtd_decide_config(IntelIOMMUState *s, Error **errp) { X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(s);