From patchwork Wed Aug 9 20:51:20 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lan Tianyu X-Patchwork-Id: 800069 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3xSXs36q4Dz9sNd for ; Thu, 10 Aug 2017 12:58:45 +1000 (AEST) Received: from localhost ([::1]:50750 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dfdgJ-0003Am-KL for incoming@patchwork.ozlabs.org; Wed, 09 Aug 2017 22:58:43 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51358) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dfdfi-000392-M3 for qemu-devel@nongnu.org; Wed, 09 Aug 2017 22:58:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dfdfe-0002cC-Ry for qemu-devel@nongnu.org; Wed, 09 Aug 2017 22:58:06 -0400 Received: from mga07.intel.com ([134.134.136.100]:53881) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dfdfe-0002aX-JL for qemu-devel@nongnu.org; Wed, 09 Aug 2017 22:58:02 -0400 Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga105.jf.intel.com with ESMTP; 09 Aug 2017 19:58:01 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,349,1498546800"; d="scan'208";a="117462840" Received: from sky-ws.sh.intel.com (HELO localhost) ([10.239.48.141]) by orsmga004.jf.intel.com with ESMTP; 09 Aug 2017 19:57:58 -0700 From: Lan Tianyu To: qemu-devel@nongnu.org, xen-devel@lists.xenproject.org Date: Wed, 9 Aug 2017 16:51:20 -0400 Message-Id: <1502311882-11038-2-git-send-email-tianyu.lan@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1502311882-11038-1-git-send-email-tianyu.lan@intel.com> References: <1502311882-11038-1-git-send-email-tianyu.lan@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.100 Subject: [Qemu-devel] [PATCH V2 1/3] i386/msi: Correct mask of destination ID in MSI address X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lan Tianyu , kevin.tian@intel.com, sstabellini@kernel.org, ehabkost@redhat.com, mst@redhat.com, marcel@redhat.com, anthony.perard@citrix.com, pbonzini@redhat.com, Chao Gao , rth@twiddle.net Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Chao Gao According to SDM 10.11.1, only [19:12] bits of MSI address are Destination ID, change the mask to avoid ambiguity for VT-d spec has used the bit 4 to indicate a remappable interrupt request. Signed-off-by: Chao Gao Signed-off-by: Lan Tianyu Reviewed-by: Anthony PERARD Reviewed-by: Peter Xu --- include/hw/i386/apic-msidef.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/hw/i386/apic-msidef.h b/include/hw/i386/apic-msidef.h index 8b4d4cc..420b411 100644 --- a/include/hw/i386/apic-msidef.h +++ b/include/hw/i386/apic-msidef.h @@ -26,6 +26,6 @@ #define MSI_ADDR_DEST_ID_SHIFT 12 #define MSI_ADDR_DEST_IDX_SHIFT 4 -#define MSI_ADDR_DEST_ID_MASK 0x00ffff0 +#define MSI_ADDR_DEST_ID_MASK 0x000ff000 #endif /* HW_APIC_MSIDEF_H */