From patchwork Wed Jul 19 13:39:54 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 791023 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3xCJLJ0n9Hz9s8J for ; Wed, 19 Jul 2017 23:49:44 +1000 (AEST) Received: from localhost ([::1]:33531 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dXpMD-0002Dt-Jw for incoming@patchwork.ozlabs.org; Wed, 19 Jul 2017 09:49:41 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45022) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dXpLO-0002Bn-4q for qemu-devel@nongnu.org; Wed, 19 Jul 2017 09:48:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dXpLN-0008Jx-Bk for qemu-devel@nongnu.org; Wed, 19 Jul 2017 09:48:50 -0400 Received: from mx1.redhat.com ([209.132.183.28]:44124) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dXpLI-0008Hn-UF; Wed, 19 Jul 2017 09:48:45 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 9EDF47CB84; Wed, 19 Jul 2017 13:39:59 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 9EDF47CB84 Authentication-Results: ext-mx02.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx02.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=drjones@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 9EDF47CB84 Received: from cav-thunderx1s-cn88xx-03.khw.lab.eng.bos.redhat.com (cav-thunderx1s-cn88xx-03.khw.lab.eng.bos.redhat.com [10.16.185.204]) by smtp.corp.redhat.com (Postfix) with ESMTP id EBDA860606; Wed, 19 Jul 2017 13:39:58 +0000 (UTC) From: Andrew Jones To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Date: Wed, 19 Jul 2017 09:39:54 -0400 Message-Id: <1500471597-2517-2-git-send-email-drjones@redhat.com> In-Reply-To: <1500471597-2517-1-git-send-email-drjones@redhat.com> References: <1500471597-2517-1-git-send-email-drjones@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Wed, 19 Jul 2017 13:39:59 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 1/4] hw/arm/virt: add pmu interrupt state X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, agraf@suse.de, cdall@linaro.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Mimicking gicv3-maintenance-interrupt, add the PMU's interrupt to CPU state. Signed-off-by: Andrew Jones Reviewed-by: Peter Maydell --- hw/arm/virt.c | 3 +++ target/arm/cpu.c | 2 ++ target/arm/cpu.h | 2 ++ 3 files changed, 7 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 31739d75a3e0..ea26f0c473c2 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -610,6 +610,9 @@ static void create_gic(VirtMachineState *vms, qemu_irq *pic) qdev_connect_gpio_out_named(cpudev, "gicv3-maintenance-interrupt", 0, qdev_get_gpio_in(gicdev, ppibase + ARCH_GICV3_MAINT_IRQ)); + qdev_connect_gpio_out_named(cpudev, "pmu-interrupt", 0, + qdev_get_gpio_in(gicdev, ppibase + + VIRTUAL_PMU_IRQ)); sysbus_connect_irq(gicbusdev, i, qdev_get_gpio_in(cpudev, ARM_CPU_IRQ)); sysbus_connect_irq(gicbusdev, i + smp_cpus, diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 96d1f840301f..fd82c7944840 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -499,6 +499,8 @@ static void arm_cpu_initfn(Object *obj) qdev_init_gpio_out_named(DEVICE(cpu), &cpu->gicv3_maintenance_interrupt, "gicv3-maintenance-interrupt", 1); + qdev_init_gpio_out_named(DEVICE(cpu), &cpu->pmu_interrupt, + "pmu-interrupt", 1); #endif /* DTB consumers generally don't in fact care what the 'compatible' diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 102c58afac52..8d91166eb97b 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -584,6 +584,8 @@ struct ARMCPU { qemu_irq gt_timer_outputs[NUM_GTIMERS]; /* GPIO output for GICv3 maintenance interrupt signal */ qemu_irq gicv3_maintenance_interrupt; + /* GPIO output for the PMU interrupt */ + qemu_irq pmu_interrupt; /* MemoryRegion to use for secure physical accesses */ MemoryRegion *secure_memory;