From patchwork Wed Jul 5 17:13:36 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?C=C3=A9dric_Le_Goater?= X-Patchwork-Id: 784791 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3x2p3q6VgQz9s75 for ; Thu, 6 Jul 2017 03:37:43 +1000 (AEST) Received: from localhost ([::1]:47397 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dSoF2-0007I4-Ou for incoming@patchwork.ozlabs.org; Wed, 05 Jul 2017 13:37:32 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42260) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dSnua-00056K-Ee for qemu-devel@nongnu.org; Wed, 05 Jul 2017 13:16:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dSnuW-0004JQ-E4 for qemu-devel@nongnu.org; Wed, 05 Jul 2017 13:16:24 -0400 Received: from 5.mo3.mail-out.ovh.net ([87.98.178.36]:59183) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dSnuW-0004IQ-7P for qemu-devel@nongnu.org; Wed, 05 Jul 2017 13:16:20 -0400 Received: from player158.ha.ovh.net (b6.ovh.net [213.186.33.56]) by mo3.mail-out.ovh.net (Postfix) with ESMTP id 26EEAFCE22 for ; Wed, 5 Jul 2017 19:16:19 +0200 (CEST) Received: from zorba.kaod.org.com (LFbn-1-10652-153.w90-89.abo.wanadoo.fr [90.89.238.153]) (Authenticated sender: clg@kaod.org) by player158.ha.ovh.net (Postfix) with ESMTPSA id EF9DC62007C; Wed, 5 Jul 2017 19:16:12 +0200 (CEST) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: David Gibson Date: Wed, 5 Jul 2017 19:13:36 +0200 Message-Id: <1499274819-15607-24-git-send-email-clg@kaod.org> X-Mailer: git-send-email 2.7.5 In-Reply-To: <1499274819-15607-1-git-send-email-clg@kaod.org> References: <1499274819-15607-1-git-send-email-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 2225622641534602214 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeelkedrudeigdduuddtucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddm X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 87.98.178.36 Subject: [Qemu-devel] [RFC PATCH 23/26] spapr: add a XIVE object to the sPAPR machine X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , qemu-ppc@nongnu.org, Alexander Graf , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Let's create the XIVE object whether it used or not by the machine. CAS will decide which model will be used for the interrupt controller. Signed-off-by: Cédric Le Goater --- hw/ppc/spapr.c | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 0256e7a537bf..45527b4c5eca 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -54,6 +54,7 @@ #include "hw/ppc/spapr_vio.h" #include "hw/pci-host/spapr.h" #include "hw/ppc/xics.h" +#include "hw/ppc/xive.h" #include "hw/pci/msi.h" #include "hw/pci/pci.h" @@ -204,6 +205,38 @@ static void xics_system_init(MachineState *machine, int nr_irqs, Error **errp) } } +static XIVE *spapr_xive_create(sPAPRMachineState *spapr, int nr_servers, + Error **errp) +{ + Error *local_err = NULL; + Object *obj; + + /* TODO: We don't have KVM support yet so check irqchip=off here */ + if (kvm_enabled() && machine_kernel_irqchip_required(MACHINE(spapr))) { + error_prepend(errp, "kernel_irqchip requested but unavailable"); + return NULL; + } + + obj = object_new(TYPE_XIVE); + object_property_add_child(OBJECT(spapr), "xive", obj, &error_abort); + object_property_set_int(obj, nr_servers, "nr-targets", &local_err); + if (local_err) { + goto error; + } + object_property_set_bool(obj, true, "realized", &local_err); + if (local_err) { + goto error; + } + + /* Install hcalls */ + xive_spapr_init(spapr); + + return XIVE(obj); +error: + error_propagate(errp, local_err); + return NULL; +} + static int spapr_fixup_cpu_smt_dt(void *fdt, int offset, PowerPCCPU *cpu, int smt_threads) { @@ -2192,6 +2225,14 @@ static void ppc_spapr_init(MachineState *machine) /* Set up Interrupt Controller before we create the VCPUs */ xics_system_init(machine, XICS_IRQS_SPAPR, &error_fatal); + /* Set up XIVE. CAS will choose whether the guest runs in XICS + * (legacy mode) or XIVE Exploitation mode + * + * TODO: if XIVE creation fails, force the use of XICS legacy + */ + spapr->xive = spapr_xive_create(spapr, xics_max_server_number(), + &error_fatal); + /* Set up containers for ibm,client-set-architecture negotiated options */ spapr->ov5 = spapr_ovec_new(); spapr->ov5_cas = spapr_ovec_new();