From patchwork Wed Jul 5 17:13:31 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?C=C3=A9dric_Le_Goater?= X-Patchwork-Id: 784780 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3x2nnB4Z6Bz9s0Z for ; Thu, 6 Jul 2017 03:25:02 +1000 (AEST) Received: from localhost ([::1]:47322 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dSo2s-0004Od-9V for incoming@patchwork.ozlabs.org; Wed, 05 Jul 2017 13:24:58 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41943) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dSnu5-0004ey-Lh for qemu-devel@nongnu.org; Wed, 05 Jul 2017 13:15:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dSnu1-00040B-LY for qemu-devel@nongnu.org; Wed, 05 Jul 2017 13:15:53 -0400 Received: from 15.mo3.mail-out.ovh.net ([87.98.150.177]:43678) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dSnu1-0003xr-EK for qemu-devel@nongnu.org; Wed, 05 Jul 2017 13:15:49 -0400 Received: from player158.ha.ovh.net (b6.ovh.net [213.186.33.56]) by mo3.mail-out.ovh.net (Postfix) with ESMTP id 4A1E8FCCD6 for ; Wed, 5 Jul 2017 19:15:48 +0200 (CEST) Received: from zorba.kaod.org.com (LFbn-1-10652-153.w90-89.abo.wanadoo.fr [90.89.238.153]) (Authenticated sender: clg@kaod.org) by player158.ha.ovh.net (Postfix) with ESMTPSA id 20E8C62007C; Wed, 5 Jul 2017 19:15:42 +0200 (CEST) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: David Gibson Date: Wed, 5 Jul 2017 19:13:31 +0200 Message-Id: <1499274819-15607-19-git-send-email-clg@kaod.org> X-Mailer: git-send-email 2.7.5 In-Reply-To: <1499274819-15607-1-git-send-email-clg@kaod.org> References: <1499274819-15607-1-git-send-email-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 2216896917331020774 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeelkedrudeigdduuddtucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddm X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 87.98.150.177 Subject: [Qemu-devel] [RFC PATCH 18/26] ppc/xive: add device tree support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , qemu-ppc@nongnu.org, Alexander Graf , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" As for XICS, the XIVE interface for the guest is described in the device tree under the interrupt controller node. A couple of new properties are specific to XIVE : - "reg" contains the base address and size of the thread interrupt managnement areas (TIMA) for the user level for the OS level. Only the OS level is taken into account. - "ibm,xive-eq-sizes" the size of the event queues. - "ibm,xive-lisn-ranges" the interrupt numbers ranges assigned to the guest. These are allocated using a simple bitmap. Signed-off-by: Cédric Le Goater --- hw/intc/xive_spapr.c | 36 ++++++++++++++++++++++++++++++++++++ include/hw/ppc/xive.h | 1 + 2 files changed, 37 insertions(+) diff --git a/hw/intc/xive_spapr.c b/hw/intc/xive_spapr.c index b634d1f28f10..64282cb4bfab 100644 --- a/hw/intc/xive_spapr.c +++ b/hw/intc/xive_spapr.c @@ -743,3 +743,39 @@ void xive_spapr_init(sPAPRMachineState *spapr) spapr_register_hypercall(H_INT_SYNC, h_int_sync); spapr_register_hypercall(H_INT_RESET, h_int_reset); } + +void xive_spapr_populate(XIVE *x, void *fdt) +{ + int node; + uint64_t timas[2 * 2]; + uint32_t lisn_ranges[] = { + cpu_to_be32(x->int_ipi_top - x->int_base - x->nr_targets), /* start */ + cpu_to_be32(x->nr_targets), /* count */ + }; + uint32_t eq_sizes[] = { + cpu_to_be32(12), /* 4K */ + cpu_to_be32(16), /* 64K */ + cpu_to_be32(21), /* 2M */ + cpu_to_be32(24), /* 16M */ + }; + int i; + + /* Thread Interrupt Management Areas : User and OS */ + for (i = 0; i < 2; i++) { + timas[i * 2] = cpu_to_be64(x->tm_base + i * (1 << x->tm_shift)); + timas[i * 2 + 1] = cpu_to_be64(1 << x->tm_shift); + } + + _FDT(node = fdt_add_subnode(fdt, 0, "interrupt-controller")); + + _FDT(fdt_setprop_string(fdt, node, "name", "interrupt-controller")); + _FDT(fdt_setprop_string(fdt, node, "device_type", "power-ivpe")); + _FDT(fdt_setprop(fdt, node, "reg", timas, sizeof(timas))); + + _FDT(fdt_setprop_string(fdt, node, "compatible", "ibm,power-ivpe")); + _FDT(fdt_setprop_cell(fdt, node, "#interrupt-cells", 2)); + _FDT(fdt_setprop(fdt, node, "ibm,xive-eq-sizes", eq_sizes, + sizeof(eq_sizes))); + _FDT(fdt_setprop(fdt, node, "ibm,xive-lisn-ranges", lisn_ranges, + sizeof(lisn_ranges))); +} diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h index af48d62cc776..288116aeb8f4 100644 --- a/include/hw/ppc/xive.h +++ b/include/hw/ppc/xive.h @@ -66,5 +66,6 @@ struct XiveICPState { typedef struct sPAPRMachineState sPAPRMachineState; void xive_spapr_init(sPAPRMachineState *spapr); +void xive_spapr_populate(XIVE *x, void *fdt); #endif /* PPC_XIVE_H */