Message ID | 1490686352-24017-8-git-send-email-clg@kaod.org |
---|---|
State | New |
Headers | show |
On Tue, Mar 28, 2017 at 09:32:31AM +0200, Cédric Le Goater wrote: > This assigns the ICPState object to the CPU using the PIR number for > lookups before calling the XICS layer to finish the job. > > Signed-off-by: Cédric Le Goater <clg@kaod.org> > Reviewed-by: David Gibson <david@gibson.dropbear.id.au> > --- > hw/ppc/pnv.c | 2 ++ > hw/ppc/pnv_core.c | 20 ++++++++++++++++---- > 2 files changed, 18 insertions(+), 4 deletions(-) > > diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c > index e441b8ac1cad..ae894834892f 100644 > --- a/hw/ppc/pnv.c > +++ b/hw/ppc/pnv.c > @@ -711,6 +711,8 @@ static void pnv_chip_realize(DeviceState *dev, Error **errp) > object_property_set_int(OBJECT(pnv_core), > pcc->core_pir(chip, core_hwid), > "pir", &error_fatal); > + object_property_add_const_link(OBJECT(pnv_core), "xics", > + qdev_get_machine(), &error_fatal); > object_property_set_bool(OBJECT(pnv_core), true, "realized", > &error_fatal); > object_unref(OBJECT(pnv_core)); > diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c > index d79d530b4881..a5e9614dac7d 100644 > --- a/hw/ppc/pnv_core.c > +++ b/hw/ppc/pnv_core.c > @@ -25,6 +25,7 @@ > #include "hw/ppc/pnv.h" > #include "hw/ppc/pnv_core.h" > #include "hw/ppc/pnv_xscom.h" > +#include "hw/ppc/xics.h" > > static void powernv_cpu_reset(void *opaque) > { > @@ -43,7 +44,7 @@ static void powernv_cpu_reset(void *opaque) > env->msr |= MSR_HVB; /* Hypervisor mode */ > } > > -static void powernv_cpu_init(PowerPCCPU *cpu, Error **errp) > +static void powernv_cpu_init(PowerPCCPU *cpu, XICSFabric *xi, Error **errp) > { > CPUPPCState *env = &cpu->env; > int core_pir; > @@ -63,6 +64,9 @@ static void powernv_cpu_init(PowerPCCPU *cpu, Error **errp) > cpu_ppc_tb_init(env, PNV_TIMEBASE_FREQ); > > qemu_register_reset(powernv_cpu_reset, cpu); > + > + cpu->icp = OBJECT(xics_icp_get(xi, pir->default_value)); > + xics_cpu_setup(xi, cpu); Hmm.. seems like xics_cpu_setup() should probably set the cpu->icp link.. > } > > /* > @@ -110,7 +114,7 @@ static const MemoryRegionOps pnv_core_xscom_ops = { > .endianness = DEVICE_BIG_ENDIAN, > }; > > -static void pnv_core_realize_child(Object *child, Error **errp) > +static void pnv_core_realize_child(Object *child, XICSFabric *xi, Error **errp) > { > Error *local_err = NULL; > CPUState *cs = CPU(child); > @@ -122,7 +126,7 @@ static void pnv_core_realize_child(Object *child, Error **errp) > return; > } > > - powernv_cpu_init(cpu, &local_err); > + powernv_cpu_init(cpu, xi, &local_err); > if (local_err) { > error_propagate(errp, local_err); > return; > @@ -140,6 +144,14 @@ static void pnv_core_realize(DeviceState *dev, Error **errp) > void *obj; > int i, j; > char name[32]; > + Object *xi; > + > + xi = object_property_get_link(OBJECT(dev), "xics", &local_err); > + if (!xi) { > + error_setg(errp, "%s: required link 'xics' not found: %s", > + __func__, error_get_pretty(local_err)); > + return; > + } > > pc->threads = g_malloc0(size * cc->nr_threads); > for (i = 0; i < cc->nr_threads; i++) { > @@ -160,7 +172,7 @@ static void pnv_core_realize(DeviceState *dev, Error **errp) > for (j = 0; j < cc->nr_threads; j++) { > obj = pc->threads + j * size; > > - pnv_core_realize_child(obj, &local_err); > + pnv_core_realize_child(obj, XICS_FABRIC(xi), &local_err); > if (local_err) { > goto err; > }
On 03/29/2017 07:20 AM, David Gibson wrote: > On Tue, Mar 28, 2017 at 09:32:31AM +0200, Cédric Le Goater wrote: >> This assigns the ICPState object to the CPU using the PIR number for >> lookups before calling the XICS layer to finish the job. >> >> Signed-off-by: Cédric Le Goater <clg@kaod.org> >> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> >> --- >> hw/ppc/pnv.c | 2 ++ >> hw/ppc/pnv_core.c | 20 ++++++++++++++++---- >> 2 files changed, 18 insertions(+), 4 deletions(-) >> >> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c >> index e441b8ac1cad..ae894834892f 100644 >> --- a/hw/ppc/pnv.c >> +++ b/hw/ppc/pnv.c >> @@ -711,6 +711,8 @@ static void pnv_chip_realize(DeviceState *dev, Error **errp) >> object_property_set_int(OBJECT(pnv_core), >> pcc->core_pir(chip, core_hwid), >> "pir", &error_fatal); >> + object_property_add_const_link(OBJECT(pnv_core), "xics", >> + qdev_get_machine(), &error_fatal); >> object_property_set_bool(OBJECT(pnv_core), true, "realized", >> &error_fatal); >> object_unref(OBJECT(pnv_core)); >> diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c >> index d79d530b4881..a5e9614dac7d 100644 >> --- a/hw/ppc/pnv_core.c >> +++ b/hw/ppc/pnv_core.c >> @@ -25,6 +25,7 @@ >> #include "hw/ppc/pnv.h" >> #include "hw/ppc/pnv_core.h" >> #include "hw/ppc/pnv_xscom.h" >> +#include "hw/ppc/xics.h" >> >> static void powernv_cpu_reset(void *opaque) >> { >> @@ -43,7 +44,7 @@ static void powernv_cpu_reset(void *opaque) >> env->msr |= MSR_HVB; /* Hypervisor mode */ >> } >> >> -static void powernv_cpu_init(PowerPCCPU *cpu, Error **errp) >> +static void powernv_cpu_init(PowerPCCPU *cpu, XICSFabric *xi, Error **errp) >> { >> CPUPPCState *env = &cpu->env; >> int core_pir; >> @@ -63,6 +64,9 @@ static void powernv_cpu_init(PowerPCCPU *cpu, Error **errp) >> cpu_ppc_tb_init(env, PNV_TIMEBASE_FREQ); >> >> qemu_register_reset(powernv_cpu_reset, cpu); >> + >> + cpu->icp = OBJECT(xics_icp_get(xi, pir->default_value)); >> + xics_cpu_setup(xi, cpu); > > Hmm.. seems like xics_cpu_setup() should probably set the cpu->icp link.. OK. It is not problem, and I have to change 'PATCH 1' anyhow. Thanks, C. > >> } >> >> /* >> @@ -110,7 +114,7 @@ static const MemoryRegionOps pnv_core_xscom_ops = { >> .endianness = DEVICE_BIG_ENDIAN, >> }; >> >> -static void pnv_core_realize_child(Object *child, Error **errp) >> +static void pnv_core_realize_child(Object *child, XICSFabric *xi, Error **errp) >> { >> Error *local_err = NULL; >> CPUState *cs = CPU(child); >> @@ -122,7 +126,7 @@ static void pnv_core_realize_child(Object *child, Error **errp) >> return; >> } >> >> - powernv_cpu_init(cpu, &local_err); >> + powernv_cpu_init(cpu, xi, &local_err); >> if (local_err) { >> error_propagate(errp, local_err); >> return; >> @@ -140,6 +144,14 @@ static void pnv_core_realize(DeviceState *dev, Error **errp) >> void *obj; >> int i, j; >> char name[32]; >> + Object *xi; >> + >> + xi = object_property_get_link(OBJECT(dev), "xics", &local_err); >> + if (!xi) { >> + error_setg(errp, "%s: required link 'xics' not found: %s", >> + __func__, error_get_pretty(local_err)); >> + return; >> + } >> >> pc->threads = g_malloc0(size * cc->nr_threads); >> for (i = 0; i < cc->nr_threads; i++) { >> @@ -160,7 +172,7 @@ static void pnv_core_realize(DeviceState *dev, Error **errp) >> for (j = 0; j < cc->nr_threads; j++) { >> obj = pc->threads + j * size; >> >> - pnv_core_realize_child(obj, &local_err); >> + pnv_core_realize_child(obj, XICS_FABRIC(xi), &local_err); >> if (local_err) { >> goto err; >> } >
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index e441b8ac1cad..ae894834892f 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -711,6 +711,8 @@ static void pnv_chip_realize(DeviceState *dev, Error **errp) object_property_set_int(OBJECT(pnv_core), pcc->core_pir(chip, core_hwid), "pir", &error_fatal); + object_property_add_const_link(OBJECT(pnv_core), "xics", + qdev_get_machine(), &error_fatal); object_property_set_bool(OBJECT(pnv_core), true, "realized", &error_fatal); object_unref(OBJECT(pnv_core)); diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c index d79d530b4881..a5e9614dac7d 100644 --- a/hw/ppc/pnv_core.c +++ b/hw/ppc/pnv_core.c @@ -25,6 +25,7 @@ #include "hw/ppc/pnv.h" #include "hw/ppc/pnv_core.h" #include "hw/ppc/pnv_xscom.h" +#include "hw/ppc/xics.h" static void powernv_cpu_reset(void *opaque) { @@ -43,7 +44,7 @@ static void powernv_cpu_reset(void *opaque) env->msr |= MSR_HVB; /* Hypervisor mode */ } -static void powernv_cpu_init(PowerPCCPU *cpu, Error **errp) +static void powernv_cpu_init(PowerPCCPU *cpu, XICSFabric *xi, Error **errp) { CPUPPCState *env = &cpu->env; int core_pir; @@ -63,6 +64,9 @@ static void powernv_cpu_init(PowerPCCPU *cpu, Error **errp) cpu_ppc_tb_init(env, PNV_TIMEBASE_FREQ); qemu_register_reset(powernv_cpu_reset, cpu); + + cpu->icp = OBJECT(xics_icp_get(xi, pir->default_value)); + xics_cpu_setup(xi, cpu); } /* @@ -110,7 +114,7 @@ static const MemoryRegionOps pnv_core_xscom_ops = { .endianness = DEVICE_BIG_ENDIAN, }; -static void pnv_core_realize_child(Object *child, Error **errp) +static void pnv_core_realize_child(Object *child, XICSFabric *xi, Error **errp) { Error *local_err = NULL; CPUState *cs = CPU(child); @@ -122,7 +126,7 @@ static void pnv_core_realize_child(Object *child, Error **errp) return; } - powernv_cpu_init(cpu, &local_err); + powernv_cpu_init(cpu, xi, &local_err); if (local_err) { error_propagate(errp, local_err); return; @@ -140,6 +144,14 @@ static void pnv_core_realize(DeviceState *dev, Error **errp) void *obj; int i, j; char name[32]; + Object *xi; + + xi = object_property_get_link(OBJECT(dev), "xics", &local_err); + if (!xi) { + error_setg(errp, "%s: required link 'xics' not found: %s", + __func__, error_get_pretty(local_err)); + return; + } pc->threads = g_malloc0(size * cc->nr_threads); for (i = 0; i < cc->nr_threads; i++) { @@ -160,7 +172,7 @@ static void pnv_core_realize(DeviceState *dev, Error **errp) for (j = 0; j < cc->nr_threads; j++) { obj = pc->threads + j * size; - pnv_core_realize_child(obj, &local_err); + pnv_core_realize_child(obj, XICS_FABRIC(xi), &local_err); if (local_err) { goto err; }