From patchwork Thu Mar 23 09:07:31 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cao jin X-Patchwork-Id: 742561 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3vpgWL3kvpz9s3w for ; Thu, 23 Mar 2017 20:00:46 +1100 (AEDT) Received: from localhost ([::1]:55014 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cqybs-0004Zr-0U for incoming@patchwork.ozlabs.org; Thu, 23 Mar 2017 05:00:44 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43638) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cqyaG-0003aU-Rc for qemu-devel@nongnu.org; Thu, 23 Mar 2017 04:59:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cqyaE-00068a-6p for qemu-devel@nongnu.org; Thu, 23 Mar 2017 04:59:04 -0400 Received: from [59.151.112.132] (port=21022 helo=heian.cn.fujitsu.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cqyaD-00068C-AY for qemu-devel@nongnu.org; Thu, 23 Mar 2017 04:59:02 -0400 X-IronPort-AV: E=Sophos;i="5.22,518,1449504000"; d="scan'208";a="16901529" Received: from unknown (HELO cn.fujitsu.com) ([10.167.33.5]) by heian.cn.fujitsu.com with ESMTP; 23 Mar 2017 16:58:53 +0800 Received: from G08CNEXCHPEKD03.g08.fujitsu.local (unknown [10.167.33.85]) by cn.fujitsu.com (Postfix) with ESMTP id 033E747EE1E2; Thu, 23 Mar 2017 16:58:49 +0800 (CST) Received: from G08FNSTD140223.g08.fujitsu.local (10.167.226.69) by G08CNEXCHPEKD03.g08.fujitsu.local (10.167.33.89) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 23 Mar 2017 16:58:48 +0800 From: Cao jin To: , , Date: Thu, 23 Mar 2017 17:07:31 +0800 Message-ID: <1490260051-6046-1-git-send-email-caoj.fnst@cn.fujitsu.com> X-Mailer: git-send-email 2.1.0 MIME-Version: 1.0 X-Originating-IP: [10.167.226.69] X-yoursite-MailScanner-ID: 033E747EE1E2.AC6B5 X-yoursite-MailScanner: Found to be clean X-yoursite-MailScanner-From: caoj.fnst@cn.fujitsu.com X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 59.151.112.132 Subject: [Qemu-devel] [PATCH v6] vfio error recovery: kernel support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: izumi.taku@jp.fujitsu.com, alex.williamson@redhat.com, "Michael S. Tsirkin" Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: "Michael S. Tsirkin" 0. What happens now (PCIE AER only) Fatal errors cause a link reset. Non fatal errors don't. All errors stop the QEMU guest eventually, but not immediately, because it's detected and reported asynchronously. Interrupts are forwarded as usual. Correctable errors are not reported to user at all. Note: PPC EEH is different, but this approach won't affect EEH. EEH treat all errors as fatal ones in AER, so they will still be signalled to user via the legacy eventfd. Besides, all devices/functions in a PE belongs to the same IOMMU group, so the slot_reset handler in this approach won't affect EEH either. 1. Correctable errors Hardware can correct these errors without software intervention, clear the error status is enough, this is what already done now. No need to recover it, nothing changed, leave it as it is. 2. Fatal errors They will induce a link reset. This is troublesome when user is a QEMU guest. This approach doesn't touch the existing mechanism. 3. Non-fatal errors Before this patch, they are signalled to user the same way as fatal ones. With this patch, a new eventfd is introduced only for non-fatal error notification. By splitting non-fatal ones out, it will benefit AER recovery of a QEMU guest user. To maintain backwards compatibility with userspace, non-fatal errors will continue to trigger via the existing error interrupt index if a non-fatal signaling mechanism has not been registered. Note: In case of PCI Express errors, kernel might request a slot reset affecting our device (from our point of view this is a passive device reset as opposed to an active one requested by vfio itself). This might currently happen if a slot reset is requested by a driver (other than vfio) bound to another device function in the same slot. This will cause our device to lose its state so report this event to userspace. Signed-off-by: Michael S. Tsirkin Signed-off-by: Cao jin --- v6 changelog: Address all the comments from MST. drivers/vfio/pci/vfio_pci.c | 49 +++++++++++++++++++++++++++++++++++-- drivers/vfio/pci/vfio_pci_intrs.c | 38 ++++++++++++++++++++++++++++ drivers/vfio/pci/vfio_pci_private.h | 2 ++ include/uapi/linux/vfio.h | 2 ++ 4 files changed, 89 insertions(+), 2 deletions(-) diff --git a/drivers/vfio/pci/vfio_pci.c b/drivers/vfio/pci/vfio_pci.c index 324c52e..71f9a8a 100644 --- a/drivers/vfio/pci/vfio_pci.c +++ b/drivers/vfio/pci/vfio_pci.c @@ -441,7 +441,9 @@ static int vfio_pci_get_irq_count(struct vfio_pci_device *vdev, int irq_type) return (flags & PCI_MSIX_FLAGS_QSIZE) + 1; } - } else if (irq_type == VFIO_PCI_ERR_IRQ_INDEX) { + } else if (irq_type == VFIO_PCI_ERR_IRQ_INDEX || + irq_type == VFIO_PCI_NON_FATAL_ERR_IRQ_INDEX || + irq_type == VFIO_PCI_PASSIVE_RESET_IRQ_INDEX) { if (pci_is_pcie(vdev->pdev)) return 1; } else if (irq_type == VFIO_PCI_REQ_IRQ_INDEX) { @@ -796,6 +798,8 @@ static long vfio_pci_ioctl(void *device_data, case VFIO_PCI_REQ_IRQ_INDEX: break; case VFIO_PCI_ERR_IRQ_INDEX: + case VFIO_PCI_NON_FATAL_ERR_IRQ_INDEX: + case VFIO_PCI_PASSIVE_RESET_IRQ_INDEX: if (pci_is_pcie(vdev->pdev)) break; /* pass thru to return error */ @@ -1282,7 +1286,9 @@ static pci_ers_result_t vfio_pci_aer_err_detected(struct pci_dev *pdev, mutex_lock(&vdev->igate); - if (vdev->err_trigger) + if (state == pci_channel_io_normal && vdev->non_fatal_err_trigger) + eventfd_signal(vdev->non_fatal_err_trigger, 1); + else if (vdev->err_trigger) eventfd_signal(vdev->err_trigger, 1); mutex_unlock(&vdev->igate); @@ -1292,8 +1298,47 @@ static pci_ers_result_t vfio_pci_aer_err_detected(struct pci_dev *pdev, return PCI_ERS_RESULT_CAN_RECOVER; } +/* + * In case of PCI Express errors, kernel might request a slot reset + * affecting our device (from our point of view, this is a passive device + * reset as opposed to an active one requested by vfio itself). + * This might currently happen if a slot reset is requested by a driver + * (other than vfio) bound to another device function in the same slot. + * This will cause our device to lose its state, so report this event to + * userspace. + */ +static pci_ers_result_t vfio_pci_aer_slot_reset(struct pci_dev *pdev) +{ + struct vfio_pci_device *vdev; + struct vfio_device *device; + static pci_ers_result_t err = PCI_ERS_RESULT_NONE; + + device = vfio_device_get_from_dev(&pdev->dev); + if (!device) + goto err_dev; + + vdev = vfio_device_data(device); + if (!vdev) + goto err_data; + + mutex_lock(&vdev->igate); + + if (vdev->passive_reset_trigger) + eventfd_signal(vdev->passive_reset_trigger, 1); + + mutex_unlock(&vdev->igate); + + err = PCI_ERS_RESULT_RECOVERED; + +err_data: + vfio_device_put(device); +err_dev: + return err; +} + static const struct pci_error_handlers vfio_err_handlers = { .error_detected = vfio_pci_aer_err_detected, + .slot_reset = vfio_pci_aer_slot_reset, }; static struct pci_driver vfio_pci_driver = { diff --git a/drivers/vfio/pci/vfio_pci_intrs.c b/drivers/vfio/pci/vfio_pci_intrs.c index 1c46045..7157d85 100644 --- a/drivers/vfio/pci/vfio_pci_intrs.c +++ b/drivers/vfio/pci/vfio_pci_intrs.c @@ -611,6 +611,28 @@ static int vfio_pci_set_err_trigger(struct vfio_pci_device *vdev, count, flags, data); } +static int vfio_pci_set_non_fatal_err_trigger(struct vfio_pci_device *vdev, + unsigned index, unsigned start, + unsigned count, uint32_t flags, void *data) +{ + if (index != VFIO_PCI_NON_FATAL_ERR_IRQ_INDEX || start != 0 || count > 1) + return -EINVAL; + + return vfio_pci_set_ctx_trigger_single(&vdev->non_fatal_err_trigger, + count, flags, data); +} + +static int vfio_pci_set_passive_reset_trigger(struct vfio_pci_device *vdev, + unsigned index, unsigned start, + unsigned count, uint32_t flags, void *data) +{ + if (index != VFIO_PCI_PASSIVE_RESET_IRQ_INDEX || start != 0 || count > 1) + return -EINVAL; + + return vfio_pci_set_ctx_trigger_single(&vdev->passive_reset_trigger, + count, flags, data); +} + static int vfio_pci_set_req_trigger(struct vfio_pci_device *vdev, unsigned index, unsigned start, unsigned count, uint32_t flags, void *data) @@ -664,6 +686,22 @@ int vfio_pci_set_irqs_ioctl(struct vfio_pci_device *vdev, uint32_t flags, break; } break; + case VFIO_PCI_NON_FATAL_ERR_IRQ_INDEX: + switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) { + case VFIO_IRQ_SET_ACTION_TRIGGER: + if (pci_is_pcie(vdev->pdev)) + func = vfio_pci_set_non_fatal_err_trigger; + break; + } + break; + case VFIO_PCI_PASSIVE_RESET_IRQ_INDEX: + switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) { + case VFIO_IRQ_SET_ACTION_TRIGGER: + if (pci_is_pcie(vdev->pdev)) + func = vfio_pci_set_passive_reset_trigger; + break; + } + break; case VFIO_PCI_REQ_IRQ_INDEX: switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) { case VFIO_IRQ_SET_ACTION_TRIGGER: diff --git a/drivers/vfio/pci/vfio_pci_private.h b/drivers/vfio/pci/vfio_pci_private.h index f561ac1..cbc4b88 100644 --- a/drivers/vfio/pci/vfio_pci_private.h +++ b/drivers/vfio/pci/vfio_pci_private.h @@ -93,6 +93,8 @@ struct vfio_pci_device { struct pci_saved_state *pci_saved_state; int refcnt; struct eventfd_ctx *err_trigger; + struct eventfd_ctx *non_fatal_err_trigger; + struct eventfd_ctx *passive_reset_trigger; struct eventfd_ctx *req_trigger; struct list_head dummy_resources_list; }; diff --git a/include/uapi/linux/vfio.h b/include/uapi/linux/vfio.h index 519eff3..26b4be0 100644 --- a/include/uapi/linux/vfio.h +++ b/include/uapi/linux/vfio.h @@ -443,6 +443,8 @@ enum { VFIO_PCI_MSIX_IRQ_INDEX, VFIO_PCI_ERR_IRQ_INDEX, VFIO_PCI_REQ_IRQ_INDEX, + VFIO_PCI_NON_FATAL_ERR_IRQ_INDEX, + VFIO_PCI_PASSIVE_RESET_IRQ_INDEX, VFIO_PCI_NUM_IRQS };